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[74.87.59.234]) by smtp.gmail.com with ESMTPSA id f207-20020a6238d8000000b0058d9428e482sm11736789pfa.85.2023.02.08.13.14.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Feb 2023 13:14:23 -0800 (PST) Message-ID: Date: Wed, 8 Feb 2023 11:14:20 -1000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [PATCH 2/3] Replace `TARGET_TB_PCREL` with `CF_PCREL` Content-Language: en-US To: Anton Johansson , qemu-devel@nongnu.org Cc: ale@rev.ng, pbonzini@redhat.com, eduardo@habkost.net, peter.maydell@linaro.org References: <20230207104352.11055-1-anjo@rev.ng> <20230207104352.11055-3-anjo@rev.ng> From: Richard Henderson In-Reply-To: <20230207104352.11055-3-anjo@rev.ng> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52d.google.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.146, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 2/7/23 00:43, Anton Johansson wrote: > diff --git a/accel/tcg/tb-jmp-cache.h b/accel/tcg/tb-jmp-cache.h > index b3f6e78835..083939b302 100644 > --- a/accel/tcg/tb-jmp-cache.h > +++ b/accel/tcg/tb-jmp-cache.h > static inline TranslationBlock * > -tb_jmp_cache_get_tb(CPUJumpCache *jc, uint32_t hash) > +tb_jmp_cache_get_tb(CPUJumpCache *jc, uint32_t cflags, uint32_t hash) > { > -#if TARGET_TB_PCREL > - /* Use acquire to ensure current load of pc from jc. */ > - return qatomic_load_acquire(&jc->array[hash].tb); > -#else > - /* Use rcu_read to ensure current load of pc from *tb. */ > - return qatomic_rcu_read(&jc->array[hash].tb); > -#endif > + if (cflags & CF_PCREL) { > + /* Use acquire to ensure current load of pc from jc. */ > + return qatomic_load_acquire(&jc->array[hash].tb); > + } else { > + /* Use rcu_read to ensure current load of pc from *tb. */ > + return qatomic_rcu_read(&jc->array[hash].tb); > + } > } > > static inline target_ulong > tb_jmp_cache_get_pc(CPUJumpCache *jc, uint32_t hash, TranslationBlock *tb) > { > -#if TARGET_TB_PCREL > - return jc->array[hash].pc; > -#else > - return tb_pc(tb); > -#endif > + if (tb_cflags(tb) & CF_PCREL) { > + return jc->array[hash].pc; > + } else { > + return tb_pc(tb); > + } > } > > static inline void > tb_jmp_cache_set(CPUJumpCache *jc, uint32_t hash, > TranslationBlock *tb, target_ulong pc) > { > -#if TARGET_TB_PCREL > - jc->array[hash].pc = pc; > - /* Use store_release on tb to ensure pc is written first. */ > - qatomic_store_release(&jc->array[hash].tb, tb); > -#else > - /* Use the pc value already stored in tb->pc. */ > - qatomic_set(&jc->array[hash].tb, tb); > -#endif > + if (tb_cflags(tb) & CF_PCREL) { > + jc->array[hash].pc = pc; > + /* Use store_release on tb to ensure pc is written first. */ > + qatomic_store_release(&jc->array[hash].tb, tb); > + } else{ > + /* Use the pc value already stored in tb->pc. */ > + qatomic_set(&jc->array[hash].tb, tb); > + } > } These little functions made sense when they were isolating ifdefs. When they protect a sequence of conditions, if (CF_PCREL) { a } else { b } if (CF_PCREL) { c } else { d } if (CF_PCREL) { e } else { f } we probably want to hoist one check in the callers. > + return ((tb_cflags(a) & CF_PCREL || tb_pc(a) == tb_pc(b)) && Similarly things like this, where we have a PCREL test here, and also within tb_pc(). > - h = tb_hash_func(phys_pc, (TARGET_TB_PCREL ? 0 : tb_pc(tb)), > + h = tb_hash_func(phys_pc, (orig_cflags & CF_PCREL ? 0 : tb_pc(tb)), etc. This does too much at once, and also disables TARGET_TB_PCREL for one patch, changing behaviour during bisection. r~