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From: Richard Henderson <richard.henderson@linaro.org>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org
Subject: Re: [Qemu-devel] [Qemu-arm] [PATCH v1 06/12] target/arm: Decode aa32 armv8.1 three same
Date: Tue, 14 Nov 2017 09:46:15 +0100	[thread overview]
Message-ID: <e8bb9454-bdbb-34ce-edb6-df31002fbb9a@linaro.org> (raw)
In-Reply-To: <87shdi9l05.fsf@linaro.org>

On 11/13/2017 05:55 PM, Alex Bennée wrote:
>> +        case NEON_3R_VFM_VQRDMLSH:
>> +            if (!u) {
>> +                /* VFM, VFMS */
>> +                if ((5 & (1 << size)) == 0) {
>> +                    return 1;
>> +                }
>> +                break;
>> +            }
>> +            /* VQRDMLSH */
>> +            switch (size) {
>> +            case 1:
>> +                fn_gvec_ptr = gen_helper_gvec_qrdmlsh_s16;
>> +                break;
>> +            case 2:
>> +                fn_gvec_ptr = gen_helper_gvec_qrdmlsh_s32;
>> +                break;
>> +            default:
>> +                return 1;
>> +            }
>> +            goto do_vqrdmlx;
> Could we not take the opportunity to re-factor out the common bit rather
> than make this mega 

What, specifically, did you have in mind?


r~

  reply	other threads:[~2017-11-14  8:46 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-04 18:43 [Qemu-devel] [PATCH v1 00/12] ARM v8.1 simd + v8.3 complex insns Richard Henderson
2017-10-04 18:43 ` [Qemu-devel] [PATCH v1 01/12] HACK: use objdump disas Richard Henderson
2017-11-13 11:33   ` [Qemu-devel] [Qemu-arm] " Alex Bennée
2017-11-14  8:38     ` Richard Henderson
2017-10-04 18:43 ` [Qemu-devel] [PATCH v1 02/12] target/arm: Add ARM_FEATURE_V8_1_SIMD Richard Henderson
2017-11-13 11:34   ` [Qemu-devel] [Qemu-arm] " Alex Bennée
2017-10-04 18:43 ` [Qemu-devel] [PATCH v1 03/12] target/arm: Decode aa64 armv8.1 scalar three same extra Richard Henderson
2017-11-13 16:30   ` [Qemu-devel] [Qemu-arm] " Alex Bennée
2017-11-13 16:42     ` Peter Maydell
2017-11-14  8:44     ` Richard Henderson
2017-10-04 18:43 ` [Qemu-devel] [PATCH v1 04/12] target/arm: Decode aa64 armv8.1 " Richard Henderson
2017-11-13 16:41   ` Alex Bennée
2017-10-04 18:43 ` [Qemu-devel] [PATCH v1 05/12] target/arm: Decode aa64 armv8.1 scalar/vector x indexed element Richard Henderson
2017-11-13 16:44   ` [Qemu-devel] [Qemu-arm] " Alex Bennée
2017-10-04 18:43 ` [Qemu-devel] [PATCH v1 06/12] target/arm: Decode aa32 armv8.1 three same Richard Henderson
2017-11-13 16:55   ` [Qemu-devel] [Qemu-arm] " Alex Bennée
2017-11-14  8:46     ` Richard Henderson [this message]
2017-11-14 10:06       ` Alex Bennée
2017-11-14 10:46         ` Richard Henderson
2017-10-04 18:43 ` [Qemu-devel] [PATCH v1 07/12] target/arm: Decode aa32 armv8.1 two reg and a scalar Richard Henderson
2017-11-13 17:05   ` Alex Bennée
2017-11-22 13:12     ` Richard Henderson
2017-10-04 18:43 ` [Qemu-devel] [PATCH v1 08/12] target/arm: Add ARM_FEATURE_V8_FCMA Richard Henderson
2017-11-13 17:06   ` [Qemu-devel] [Qemu-arm] " Alex Bennée
2017-10-04 18:43 ` [Qemu-devel] [PATCH v1 09/12] target/arm: Decode aa64 armv8.3 fcadd Richard Henderson
2017-11-13 17:12   ` Alex Bennée
2017-10-04 18:43 ` [Qemu-devel] [PATCH v1 10/12] target/arm: Decode aa64 armv8.3 fcmla Richard Henderson
2017-10-04 18:43 ` [Qemu-devel] [PATCH v1 11/12] target/arm: Decode aa32 armv8.3 3-same Richard Henderson
2017-10-04 18:43 ` [Qemu-devel] [PATCH v1 12/12] target/arm: Decode aa32 armv8.3 2-reg-index Richard Henderson
2017-10-04 18:58 ` [Qemu-devel] [PATCH v1 00/12] ARM v8.1 simd + v8.3 complex insns no-reply
2017-10-04 18:58 ` no-reply
2017-10-04 18:58 ` no-reply
2017-11-13 17:16 ` [Qemu-devel] [Qemu-arm] " Alex Bennée

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