From: shashi.mallela@linaro.org
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Eric Auger <eric.auger@redhat.com>,
QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: SMMU Stage 2 translation in QEMU
Date: Fri, 10 Sep 2021 09:32:09 -0400 [thread overview]
Message-ID: <e8ccd74e89ba9d30d8588f0aa6966dc71d0ae923.camel@linaro.org> (raw)
In-Reply-To: <CAFEAcA8=7-hHEHyABS-FFPtacYvhFpwa7_PLVsC7-x_5rxjicg@mail.gmail.com>
So that would be the driver code running in guest OS because i see
tables being setup by arm-smmu driver code in linux,which is similar to
what happens with ITS(table base addresses programmed in registers by
linux driver).
On Fri, 2021-09-10 at 13:54 +0100, Peter Maydell wrote:
> On Fri, 10 Sept 2021 at 13:39, <shashi.mallela@linaro.org> wrote:
> > I am referring to the latter,"purely emulated QEMU with an emulated
> > SMMU that handles accesses to emulated devices"
>
> In that case, the stage 2 tables are set up by the guest
> code (running at emulated EL2), just as they would be if
> it were running on real hardware.
>
> -- PMM
next prev parent reply other threads:[~2021-09-10 13:32 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-09 20:17 SMMU Stage 2 translation in QEMU shashi.mallela
2021-09-10 9:25 ` Peter Maydell
2021-09-10 12:39 ` shashi.mallela
2021-09-10 12:54 ` Peter Maydell
2021-09-10 13:32 ` shashi.mallela [this message]
2021-09-13 8:19 ` Eric Auger
2021-09-14 15:57 ` shashi.mallela
2021-09-15 10:23 ` Eric Auger
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