* [PATCH] target/ppc/translate: Add dummy implementation for dcblc instruction
@ 2023-01-30 18:49 Bernhard Beschow
2023-01-30 22:23 ` Richard Henderson
2023-02-25 9:01 ` Daniel Henrique Barboza
0 siblings, 2 replies; 4+ messages in thread
From: Bernhard Beschow @ 2023-01-30 18:49 UTC (permalink / raw)
To: qemu-devel
Cc: Cédric Le Goater, qemu-ppc, Daniel Henrique Barboza,
Greg Kurz, David Gibson, Bernhard Beschow
The dcblc instruction is used by u-boot in mpc85xx/start.S. Without it,
an illegal istruction exception is generated very early in the boot
process where the processor is not yet able to handle exceptions. See:
https://github.com/u-boot/u-boot/blob/v2023.01/arch/powerpc/cpu/mpc85xx/start.S#L1840
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
target/ppc/translate.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index edb3daa9b5..8c32e697d9 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -5261,6 +5261,14 @@ static void gen_dcbtls(DisasContext *ctx)
tcg_temp_free(t0);
}
+/* dcblc */
+static void gen_dcblc(DisasContext *ctx)
+{
+ /*
+ * interpreted as no-op
+ */
+}
+
/* dcbz */
static void gen_dcbz(DisasContext *ctx)
{
@@ -6832,6 +6840,7 @@ GEN_HANDLER_E(dcbtep, 0x1F, 0x1F, 0x09, 0x00000001, PPC_NONE, PPC2_BOOKE206),
GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x00000001, PPC_CACHE),
GEN_HANDLER_E(dcbtstep, 0x1F, 0x1F, 0x07, 0x00000001, PPC_NONE, PPC2_BOOKE206),
GEN_HANDLER_E(dcbtls, 0x1F, 0x06, 0x05, 0x02000001, PPC_BOOKE, PPC2_BOOKE206),
+GEN_HANDLER_E(dcblc, 0x1F, 0x06, 0x0c, 0x02000001, PPC_BOOKE, PPC2_BOOKE206),
GEN_HANDLER(dcbz, 0x1F, 0x16, 0x1F, 0x03C00001, PPC_CACHE_DCBZ),
GEN_HANDLER_E(dcbzep, 0x1F, 0x1F, 0x1F, 0x03C00001, PPC_NONE, PPC2_BOOKE206),
GEN_HANDLER(dst, 0x1F, 0x16, 0x0A, 0x01800001, PPC_ALTIVEC),
--
2.39.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] target/ppc/translate: Add dummy implementation for dcblc instruction
2023-01-30 18:49 [PATCH] target/ppc/translate: Add dummy implementation for dcblc instruction Bernhard Beschow
@ 2023-01-30 22:23 ` Richard Henderson
2023-02-19 10:57 ` Bernhard Beschow
2023-02-25 9:01 ` Daniel Henrique Barboza
1 sibling, 1 reply; 4+ messages in thread
From: Richard Henderson @ 2023-01-30 22:23 UTC (permalink / raw)
To: Bernhard Beschow, qemu-devel
Cc: Cédric Le Goater, qemu-ppc, Daniel Henrique Barboza,
Greg Kurz, David Gibson
On 1/30/23 08:49, Bernhard Beschow wrote:
> The dcblc instruction is used by u-boot in mpc85xx/start.S. Without it,
> an illegal istruction exception is generated very early in the boot
> process where the processor is not yet able to handle exceptions. See:
>
> https://github.com/u-boot/u-boot/blob/v2023.01/arch/powerpc/cpu/mpc85xx/start.S#L1840
>
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
> target/ppc/translate.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index edb3daa9b5..8c32e697d9 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -5261,6 +5261,14 @@ static void gen_dcbtls(DisasContext *ctx)
> tcg_temp_free(t0);
> }
>
> +/* dcblc */
> +static void gen_dcblc(DisasContext *ctx)
> +{
> + /*
> + * interpreted as no-op
> + */
Missing
If MSR[UCLE] (user-mode cache lock enable) is set, dcblc[e] may be performed while in
user mode (MSR[PR] = 1). If MSR[UCLE] is clear, an attempt to perform this instructions
in user mode causes a DSI. ESR[DLK] is set for this DSI.
but that's also true for the current implementation of dcbtls. So,
Acked-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] target/ppc/translate: Add dummy implementation for dcblc instruction
2023-01-30 22:23 ` Richard Henderson
@ 2023-02-19 10:57 ` Bernhard Beschow
0 siblings, 0 replies; 4+ messages in thread
From: Bernhard Beschow @ 2023-02-19 10:57 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: Cédric Le Goater, qemu-ppc, Daniel Henrique Barboza,
Greg Kurz, David Gibson
Am 30. Januar 2023 22:23:59 UTC schrieb Richard Henderson <richard.henderson@linaro.org>:
>On 1/30/23 08:49, Bernhard Beschow wrote:
>> The dcblc instruction is used by u-boot in mpc85xx/start.S. Without it,
>> an illegal istruction exception is generated very early in the boot
>> process where the processor is not yet able to handle exceptions. See:
>>
>> https://github.com/u-boot/u-boot/blob/v2023.01/arch/powerpc/cpu/mpc85xx/start.S#L1840
>>
>> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>> ---
>> target/ppc/translate.c | 9 +++++++++
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
>> index edb3daa9b5..8c32e697d9 100644
>> --- a/target/ppc/translate.c
>> +++ b/target/ppc/translate.c
>> @@ -5261,6 +5261,14 @@ static void gen_dcbtls(DisasContext *ctx)
>> tcg_temp_free(t0);
>> }
>> +/* dcblc */
>> +static void gen_dcblc(DisasContext *ctx)
>> +{
>> + /*
>> + * interpreted as no-op
>> + */
>
>Missing
>
>If MSR[UCLE] (user-mode cache lock enable) is set, dcblc[e] may be performed while in
>user mode (MSR[PR] = 1). If MSR[UCLE] is clear, an attempt to perform this instructions
>in user mode causes a DSI. ESR[DLK] is set for this DSI.
>
>but that's also true for the current implementation of dcbtls. So,
>
>Acked-by: Richard Henderson <richard.henderson@linaro.org>
Ping
Does that mean it's ready to be queued or do we need a Reviewed-by as well?
>
>
>r~
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] target/ppc/translate: Add dummy implementation for dcblc instruction
2023-01-30 18:49 [PATCH] target/ppc/translate: Add dummy implementation for dcblc instruction Bernhard Beschow
2023-01-30 22:23 ` Richard Henderson
@ 2023-02-25 9:01 ` Daniel Henrique Barboza
1 sibling, 0 replies; 4+ messages in thread
From: Daniel Henrique Barboza @ 2023-02-25 9:01 UTC (permalink / raw)
To: Bernhard Beschow, qemu-devel
Cc: Cédric Le Goater, qemu-ppc, Greg Kurz, David Gibson
On 1/30/23 15:49, Bernhard Beschow wrote:
> The dcblc instruction is used by u-boot in mpc85xx/start.S. Without it,
> an illegal istruction exception is generated very early in the boot
> process where the processor is not yet able to handle exceptions. See:
>
> https://github.com/u-boot/u-boot/blob/v2023.01/arch/powerpc/cpu/mpc85xx/start.S#L1840
>
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
And queued to ppc-next. Thanks,
Daniel
> target/ppc/translate.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index edb3daa9b5..8c32e697d9 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -5261,6 +5261,14 @@ static void gen_dcbtls(DisasContext *ctx)
> tcg_temp_free(t0);
> }
>
> +/* dcblc */
> +static void gen_dcblc(DisasContext *ctx)
> +{
> + /*
> + * interpreted as no-op
> + */
> +}
> +
> /* dcbz */
> static void gen_dcbz(DisasContext *ctx)
> {
> @@ -6832,6 +6840,7 @@ GEN_HANDLER_E(dcbtep, 0x1F, 0x1F, 0x09, 0x00000001, PPC_NONE, PPC2_BOOKE206),
> GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x00000001, PPC_CACHE),
> GEN_HANDLER_E(dcbtstep, 0x1F, 0x1F, 0x07, 0x00000001, PPC_NONE, PPC2_BOOKE206),
> GEN_HANDLER_E(dcbtls, 0x1F, 0x06, 0x05, 0x02000001, PPC_BOOKE, PPC2_BOOKE206),
> +GEN_HANDLER_E(dcblc, 0x1F, 0x06, 0x0c, 0x02000001, PPC_BOOKE, PPC2_BOOKE206),
> GEN_HANDLER(dcbz, 0x1F, 0x16, 0x1F, 0x03C00001, PPC_CACHE_DCBZ),
> GEN_HANDLER_E(dcbzep, 0x1F, 0x1F, 0x1F, 0x03C00001, PPC_NONE, PPC2_BOOKE206),
> GEN_HANDLER(dst, 0x1F, 0x16, 0x0A, 0x01800001, PPC_ALTIVEC),
^ permalink raw reply [flat|nested] 4+ messages in thread
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2023-01-30 18:49 [PATCH] target/ppc/translate: Add dummy implementation for dcblc instruction Bernhard Beschow
2023-01-30 22:23 ` Richard Henderson
2023-02-19 10:57 ` Bernhard Beschow
2023-02-25 9:01 ` Daniel Henrique Barboza
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