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* [PATCH] hw/ssi/aspeed_smc: Allow 64-bit wide flash accesses
@ 2025-04-22  0:27 Joe Komlodi
  2025-04-22 13:38 ` Cédric Le Goater
  2025-04-23  6:57 ` Cédric Le Goater
  0 siblings, 2 replies; 3+ messages in thread
From: Joe Komlodi @ 2025-04-22  0:27 UTC (permalink / raw)
  To: qemu-devel
  Cc: venture, alistair, clg, peter.maydell, steven_lee, leetroy,
	jamin_lin, joel, andrew, qemu-arm

cde3247651dc998da5dc1005148302a90d72f21f fixed atomicity for LDRD, which
ends up making accesses 64-bits wide. However, the AST2600 bootloader
can sometimes compile with LDRD instructions, which causes the acceses
to fail when accessing the memory-mapped SPI flash.

To fix this, increase the MMIO region valid access size to allow for
64-bit accesses.

Signed-off-by: Joe Komlodi <komlodi@google.com>
---
 hw/ssi/aspeed_smc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index faef1a8e5b..a1160187a4 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -359,7 +359,7 @@ static const MemoryRegionOps aspeed_smc_flash_default_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
     .valid = {
         .min_access_size = 1,
-        .max_access_size = 4,
+        .max_access_size = 8,
     },
 };
 
@@ -670,7 +670,7 @@ static const MemoryRegionOps aspeed_smc_flash_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
     .valid = {
         .min_access_size = 1,
-        .max_access_size = 4,
+        .max_access_size = 8,
     },
 };
 
-- 
2.49.0.805.g082f7c87e0-goog



^ permalink raw reply related	[flat|nested] 3+ messages in thread

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2025-04-22  0:27 [PATCH] hw/ssi/aspeed_smc: Allow 64-bit wide flash accesses Joe Komlodi
2025-04-22 13:38 ` Cédric Le Goater
2025-04-23  6:57 ` Cédric Le Goater

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