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([2602:ae:1598:4c01:66a6:82c2:d794:68f6]) by smtp.gmail.com with ESMTPSA id ix22-20020a170902f81600b001a943c41c37sm2311754plb.7.2023.06.02.22.35.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 02 Jun 2023 22:35:56 -0700 (PDT) Message-ID: Date: Fri, 2 Jun 2023 22:35:54 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 01/20] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20230602155223.2040685-1-peter.maydell@linaro.org> <20230602155223.2040685-2-peter.maydell@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: <20230602155223.2040685-2-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.095, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 6/2/23 08:52, Peter Maydell wrote: > The atomic memory operations are supposed to return the old memory > data value in the destination register. This value is not > sign-extended, even if the operation is the signed minimum or > maximum. (In the pseudocode for the instructions the returned data > value is passed to ZeroExtend() to create the value in the register.) > > We got this wrong because we were doing a 32-to-64 zero extend on the > result for 8 and 16 bit data values, rather than the correct amount > of zero extension. > > Fix the bug by using ext8u and ext16u for the MO_8 and MO_16 data > sizes rather than ext32u. > > Cc:qemu-stable@nongnu.org > Signed-off-by: Peter Maydell > --- > target/arm/tcg/translate-a64.c | 18 ++++++++++++++++-- > 1 file changed, 16 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson r~