From: Richard Henderson <richard.henderson@linaro.org>
To: Taylor Simpson <tsimpson@quicinc.com>, qemu-devel@nongnu.org
Cc: ale@rev.ng, bcain@quicinc.com, f4bug@amsat.org
Subject: Re: [PATCH v2] Hexagon (target/hexagon) probe the stores in a packet at start of commit
Date: Fri, 1 Oct 2021 11:55:14 -0400 [thread overview]
Message-ID: <ea3a113e-703c-e8b4-1bd9-45ffe79ba6a9@linaro.org> (raw)
In-Reply-To: <1633036599-7637-1-git-send-email-tsimpson@quicinc.com>
On 9/30/21 5:16 PM, Taylor Simpson wrote:
> + } else if (has_store_s0 && has_store_s1) {
> + TCGv mem_idx = tcg_const_tl(ctx->mem_idx);
> + gen_helper_probe_pkt_scalar_store_s0(cpu_env, mem_idx);
> + tcg_temp_free(mem_idx);
> + }
So we're assuming that the s1 store happens first?
If so, you could expand the comment above.
Otherwise, it looks good.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2021-10-01 15:56 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-30 21:16 [PATCH v2] Hexagon (target/hexagon) probe the stores in a packet at start of commit Taylor Simpson
2021-09-30 21:41 ` Philippe Mathieu-Daudé
2021-10-01 15:55 ` Richard Henderson [this message]
2021-10-01 16:14 ` Taylor Simpson
-- strict thread matches above, loose matches on Subject: below --
2021-09-22 23:11 Taylor Simpson
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