Re: [PATCH 04/22] target/arm: hide all versions of DBGD[RS]AR from gdbstub

[Richard Henderson <richard.henderson@linaro.org>]

On 11/6/23 10:50, Alex Bennée wrote:
> This avoids two duplicates being presented to gdbstub. As the
> registers are RAZ anyway it is unlikely their value would be of use to
> someone using gdbstub anyway.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Message-Id: <20231103195956.1998255-5-alex.bennee@linaro.org>
> ---
>   target/arm/debug_helper.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)

Acked-by: Richard Henderson <richard.henderson@linaro.org>


r~

> 
> diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c
> index 79a3659c0c..dc783adba5 100644
> --- a/target/arm/debug_helper.c
> +++ b/target/arm/debug_helper.c
> @@ -937,14 +937,14 @@ static const ARMCPRegInfo debug_cp_reginfo[] = {
>        */
>       { .name = "DBGDRAR", .cp = 14, .crn = 1, .crm = 0, .opc1 = 0, .opc2 = 0,
>         .access = PL0_R, .accessfn = access_tdra,
> -      .type = ARM_CP_CONST, .resetvalue = 0 },
> +      .type = ARM_CP_CONST | ARM_CP_NO_GDB, .resetvalue = 0 },
>       { .name = "MDRAR_EL1", .state = ARM_CP_STATE_AA64,
>         .opc0 = 2, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 0,
>         .access = PL1_R, .accessfn = access_tdra,
>         .type = ARM_CP_CONST, .resetvalue = 0 },
>       { .name = "DBGDSAR", .cp = 14, .crn = 2, .crm = 0, .opc1 = 0, .opc2 = 0,
>         .access = PL0_R, .accessfn = access_tdra,
> -      .type = ARM_CP_CONST, .resetvalue = 0 },
> +      .type = ARM_CP_CONST | ARM_CP_NO_GDB, .resetvalue = 0 },
>       /* Monitor debug system control register; the 32-bit alias is DBGDSCRext. */
>       { .name = "MDSCR_EL1", .state = ARM_CP_STATE_BOTH,
>         .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 2,
> @@ -1065,9 +1065,9 @@ static const ARMCPRegInfo debug_cp_reginfo[] = {
>   static const ARMCPRegInfo debug_lpae_cp_reginfo[] = {
>       /* 64 bit access versions of the (dummy) debug registers */
>       { .name = "DBGDRAR", .cp = 14, .crm = 1, .opc1 = 0,
> -      .access = PL0_R, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
> +      .access = PL0_R, .type = ARM_CP_CONST | ARM_CP_64BIT | ARM_CP_NO_GDB, .resetvalue = 0 },
>       { .name = "DBGDSAR", .cp = 14, .crm = 2, .opc1 = 0,
> -      .access = PL0_R, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
> +      .access = PL0_R, .type = ARM_CP_CONST | ARM_CP_64BIT | ARM_CP_NO_GDB, .resetvalue = 0 },
>   };
>   
>   static void dbgwvr_write(CPUARMState *env, const ARMCPRegInfo *ri,