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From: Josh Triplett <josh@joshtriplett.org>
To: qemu-devel@nongnu.org
Cc: Anthony Liguori <aliguori@us.ibm.com>,
	Paul Brook <paul@codesourcery.com>
Subject: [Qemu-devel] [PATCH 3/3] Handle parse failures in CPU definitions, and avoid adding a partial cpudef
Date: Mon, 16 Jan 2012 02:41:29 +1100	[thread overview]
Message-ID: <ea6445f9292c229e4a47ac604feb11ef5b2efb74.1326641605.git.josh@joshtriplett.org> (raw)
In-Reply-To: <cover.1326641605.git.josh@joshtriplett.org>

Without this change, a parse failure would stop the processing of the
cpudef entry, but the partially-parsed CPU definition would still get
added to the list of CPUs.

Signed-off-by: Josh Triplett <josh@joshtriplett.org>
---
 target-i386/cpuid.c |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
index ea55f69..c2a95c4 100644
--- a/target-i386/cpuid.c
+++ b/target-i386/cpuid.c
@@ -1065,7 +1065,10 @@ static int cpudef_register(QemuOpts *opts, void *opaque)
 {
     x86_def_t *def = g_malloc0(sizeof (x86_def_t));
 
-    qemu_opt_foreach(opts, cpudef_setfield, def, 1);
+    if (qemu_opt_foreach(opts, cpudef_setfield, def, 1) != 0) {
+        g_free(def);
+        return 1;
+    }
     def->msr_gpf = qemu_opt_get_bool(opts, "msr_gpf", false);
     def->next = x86_defs;
     x86_defs = def;
-- 
1.7.8.3

  parent reply	other threads:[~2012-01-15 15:41 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-01-15 15:39 [Qemu-devel] [PATCH 0/3] Support configurable CPU Model-Specific Registers (MSRs) in cpudefs Josh Triplett
2012-01-15 15:39 ` [Qemu-devel] [PATCH 1/3] Add cpudef option to GPF on unknown MSRs Josh Triplett
2012-01-15 15:39 ` [Qemu-devel] [PATCH 2/3] Support arbitrary additional MSRs in cpu definitions Josh Triplett
2012-01-15 15:41 ` Josh Triplett [this message]
2012-01-15 18:08 ` [Qemu-devel] [PATCH 0/3] Support configurable CPU Model-Specific Registers (MSRs) in cpudefs Andreas Färber

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