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[174.21.149.226]) by smtp.gmail.com with ESMTPSA id u24sm17456609pgo.65.2020.04.17.20.36.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 17 Apr 2020 20:36:11 -0700 (PDT) Subject: Re: [PATCH 11/16] target/arm: Update contiguous first-fault and no-fault loads To: Peter Maydell References: <20200311064420.30606-1-richard.henderson@linaro.org> <20200311064420.30606-12-richard.henderson@linaro.org> From: Richard Henderson Message-ID: Date: Fri, 17 Apr 2020 20:36:09 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::642 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm , QEMU Developers Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 4/16/20 7:15 AM, Peter Maydell wrote: >> + * While we do not have access to the memory attributes from the PTE >> + * to tell Device memory from Normal memory, we can validly assume that >> + * non-RAM has been mapped as Device memory. Thus we indicate fault >> + * on all MMIO. > > I don't think you can assume this; for instance a QEMU 'romd' > device might reasonably be mapped as Normal memory but currently > be in "send all accesses to my read/write functions" mode. If that is so, then TLB_MMIO will be set in the tlb_entry comparator. See accel/tcg/cputlb.c:882. r~