From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 4/9] target/arm: Support migration when FPSR/FPCR won't fit in the FPSCR
Date: Fri, 28 Jun 2024 09:01:56 -0700 [thread overview]
Message-ID: <ea780763-ffb8-4a97-8a60-5128f1ed017e@linaro.org> (raw)
In-Reply-To: <20240628142347.1283015-5-peter.maydell@linaro.org>
On 6/28/24 07:23, Peter Maydell wrote:
> To support FPSR and FPCR bits that don't exist in the AArch32 FPSCR
> view of floating point control and status (such as the FEAT_AFP ones),
> we need to make sure those bits can be migrated. This commit allows
> that, whilst maintaining backwards and forwards migration compatibility
> for CPUs where there are no such bits:
>
> On sending:
> * If either the FPCR or the FPSR include set bits that are not
> visible in the AArch32 FPSCR view of floating point control/status
> then we send the FPCR and FPSR as two separate fields in a new
> cpu/vfp/fpcr_fpsr subsection, and we send a 0 for the old
> FPSCR field in cpu/vfp
> * Otherwise, we don't send the fpcr_fpsr subsection, and we send
> an FPSCR-format value in cpu/vfp as we did previously
>
> On receiving:
> * if we see a non-zero FPSCR field, that is the right information
> * if we see a fpcr_fpsr subsection then that has the information
> * if we see neither, then FPSCR/FPCR/FPSR are all zero on the source;
> cpu_pre_load() ensures the CPU state defaults to that
> * if we see both, then the migration source is buggy or malicious;
> either the fpcr_fpsr or the FPSCR will "win" depending which
> is first in the migration stream; we don't care which that is
>
> We make the new FPCR and FPSR on-the-wire data be 64 bits, because
> architecturally these registers are that wide, and this avoids the
> need to engage in further migration-compatibility contortions in
> future if some new architecture revision defines bits in the high
> half of either register.
>
> (We won't ever send the new migration subsection until we add support
> for a CPU feature which enables setting overlapping FPCR bits, like
> FEAT_AFP.)
>
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
> target/arm/machine.c | 134 ++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 132 insertions(+), 2 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Not ideal, as vfp_get_{fpcr,fpsr} are called 3 or 4 times during migration. But unless we
have separate 'fp*r_migrate' fields in cpu state, initialized in pre_save, there's no
getting around it. And I suppose migration isn't exactly performance critical.
r~
next prev parent reply other threads:[~2024-06-28 16:02 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-28 14:23 [PATCH 0/9] target/arm: Refactor FPCR/FPSR handling to prepare for FEAT_AFP Peter Maydell
2024-06-28 14:23 ` [PATCH 1/9] target/arm: Correct comments about M-profile FPSCR Peter Maydell
2024-06-28 14:57 ` Richard Henderson
2024-06-28 14:23 ` [PATCH 2/9] target/arm: Make vfp_get_fpscr() call vfp_get_{fpcr, fpsr} Peter Maydell
2024-06-28 15:37 ` Richard Henderson
2024-06-28 14:23 ` [PATCH 3/9] target/arm: Make vfp_set_fpscr() call vfp_set_{fpcr, fpsr} Peter Maydell
2024-06-28 15:50 ` Richard Henderson
2024-06-28 14:23 ` [PATCH 4/9] target/arm: Support migration when FPSR/FPCR won't fit in the FPSCR Peter Maydell
2024-06-28 16:01 ` Richard Henderson [this message]
2024-06-28 16:27 ` Peter Maydell
2024-06-28 14:23 ` [PATCH 5/9] target/arm: Implement store_cpu_field_low32() macro Peter Maydell
2024-06-28 16:02 ` Richard Henderson
2024-06-28 14:23 ` [PATCH 6/9] target/arm: Store FPSR and FPCR in separate CPU state fields Peter Maydell
2024-06-28 16:06 ` Richard Henderson
2024-06-28 14:23 ` [PATCH 7/9] target/arm: Rename FPCR_ QC, NZCV macros to FPSR_ Peter Maydell
2024-06-28 16:07 ` Richard Henderson
2024-06-28 14:23 ` [PATCH 8/9] target/arm: Rename FPSR_MASK and FPCR_MASK and define them symbolically Peter Maydell
2024-06-28 16:12 ` Richard Henderson
2024-06-28 14:23 ` [PATCH 9/9] target/arm: Allow FPCR bits that aren't in FPSCR Peter Maydell
2024-06-28 16:14 ` Richard Henderson
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