From: Shameerali Kolothum Thodi via <qemu-devel@nongnu.org>
To: Nathan Chen <nathanc@nvidia.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "berrange@redhat.com" <berrange@redhat.com>,
"ddutile@redhat.com" <ddutile@redhat.com>,
"eric.auger@redhat.com" <eric.auger@redhat.com>,
"gustavo.romero@linaro.org" <gustavo.romero@linaro.org>,
"imammedo@redhat.com" <imammedo@redhat.com>,
"jgg@nvidia.com" <jgg@nvidia.com>,
jiangkunkun <jiangkunkun@huawei.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Linuxarm <linuxarm@huawei.com>,
"mochs@nvidia.com" <mochs@nvidia.com>,
"nicolinc@nvidia.com" <nicolinc@nvidia.com>,
"peter.maydell@linaro.org" <peter.maydell@linaro.org>,
"qemu-arm@nongnu.org" <qemu-arm@nongnu.org>,
"smostafa@google.com" <smostafa@google.com>,
"Wangzhou (B)" <wangzhou1@hisilicon.com>,
"zhangfei.gao@linaro.org" <zhangfei.gao@linaro.org>
Subject: RE: [PATCH v5 00/11] hw/arm/virt: Add support for user creatable SMMUv3 device
Date: Wed, 2 Jul 2025 15:08:02 +0000 [thread overview]
Message-ID: <ea936a5cdfcb4d6187d35794d1eb65fd@huawei.com> (raw)
In-Reply-To: <81708f09-849a-4b01-9e4c-a854ae26eefb@nvidia.com>
> -----Original Message-----
> From: Nathan Chen <nathanc@nvidia.com>
> Sent: Wednesday, July 2, 2025 2:02 AM
> To: qemu-devel@nongnu.org
> Cc: berrange@redhat.com; ddutile@redhat.com; eric.auger@redhat.com;
> gustavo.romero@linaro.org; imammedo@redhat.com; jgg@nvidia.com;
> jiangkunkun <jiangkunkun@huawei.com>; Jonathan Cameron
> <jonathan.cameron@huawei.com>; Linuxarm <linuxarm@huawei.com>;
> mochs@nvidia.com; nathanc@nvidia.com; nicolinc@nvidia.com;
> peter.maydell@linaro.org; qemu-arm@nongnu.org; Shameerali Kolothum
> Thodi <shameerali.kolothum.thodi@huawei.com>; smostafa@google.com;
> Wangzhou (B) <wangzhou1@hisilicon.com>; zhangfei.gao@linaro.org
> Subject: Re: [PATCH v5 00/11] hw/arm/virt: Add support for user creatable
> SMMUv3 device
>
> > To address this, patch #6 in the series introduces a new helper
> > function pci_setup_iommu_per_bus(), which explicitly sets the
> > iommu_per_bus field in the PCIBus structure. This allows
> > pci_device_get_iommu_bus_devfn() to retrieve IOMMU ops based
> > on the specific bus.
> >
> > This patch series introduces support for a user-creatable SMMUv3
> device
> > (-device arm-smmuv3) in QEMU.
>
> Tested-by: Nathan Chen <nathanc@nvidia.com>
>
> I re-ran the test from v3 [0] and am able to create 16 SMMUv3 devices in
> a qemu VM with emulated devices properly associated with the guest
> SMMUs
> in guest sysfs - verified with some guest SMMUs having two or three
> emulated NICs assigned to them while other guest SMMUs have a minimum
> of
> one assigned.
>
> Removing SMMUv3 devices from the VM config described above, I do not
> observe the problematic behavior where devices behind PXBs without
> SMMUs
> erroneously use the address space from pcie.0's SMMU. I removed SMMUv3
> devices from PXBs with one, two, and three emulated NICs assigned to
> them. Below are the guest topology and qemu command used where
> SMMUv3
> devices are excluded from the original test:
Cool. Appreciate testing that specifically.
Thanks,
Shameer
prev parent reply other threads:[~2025-07-02 15:09 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-23 9:42 [PATCH v5 00/11] hw/arm/virt: Add support for user creatable SMMUv3 device Shameer Kolothum via
2025-06-23 9:42 ` [PATCH v5 01/11] hw/arm/smmu-common: Check SMMU has PCIe Root Complex association Shameer Kolothum via
2025-06-23 11:32 ` Jonathan Cameron via
2025-06-27 11:52 ` Eric Auger
2025-06-30 7:01 ` Shameerali Kolothum Thodi via
2025-07-01 6:31 ` Eric Auger
2025-06-23 9:42 ` [PATCH v5 02/11] hw/arm/virt-acpi-build: Re-arrange SMMUv3 IORT build Shameer Kolothum via
2025-06-27 11:54 ` Eric Auger
2025-06-23 9:42 ` [PATCH v5 03/11] hw/arm/virt-acpi-build: Update IORT for multiple smmuv3 devices Shameer Kolothum via
2025-06-23 9:42 ` [PATCH v5 04/11] hw/arm/virt: Factor out common SMMUV3 dt bindings code Shameer Kolothum via
2025-06-23 9:42 ` [PATCH v5 05/11] hw/arm/virt: Add an SMMU_IO_LEN macro Shameer Kolothum via
2025-06-23 11:35 ` Jonathan Cameron via
2025-06-23 9:42 ` [PATCH v5 06/11] hw/pci: Introduce pci_setup_iommu_per_bus() for per-bus IOMMU ops retrieval Shameer Kolothum via
2025-06-23 11:39 ` Jonathan Cameron via
2025-06-27 12:04 ` Eric Auger
2025-06-30 7:05 ` Shameerali Kolothum Thodi via
2025-06-23 9:42 ` [PATCH v5 07/11] hw/arm/virt: Allow user-creatable SMMUv3 dev instantiation Shameer Kolothum via
2025-06-23 11:46 ` Jonathan Cameron via
2025-06-27 12:05 ` Eric Auger
2025-06-23 9:42 ` [PATCH v5 08/11] qemu-options.hx: Document the arm-smmuv3 device Shameer Kolothum via
2025-06-23 11:47 ` Jonathan Cameron via
2025-06-27 12:08 ` Eric Auger
2025-06-23 9:42 ` [PATCH v5 09/11] bios-tables-test: Allow for smmuv3 test data Shameer Kolothum via
2025-06-23 11:49 ` Jonathan Cameron via
2025-06-27 12:14 ` Eric Auger
2025-06-23 9:42 ` [PATCH v5 10/11] qtest/bios-tables-test: Add tests for legacy smmuv3 and smmuv3 device Shameer Kolothum via
2025-06-23 11:57 ` Jonathan Cameron via
2025-06-27 12:34 ` Eric Auger
2025-06-30 7:08 ` Shameerali Kolothum Thodi via
2025-06-23 9:42 ` [PATCH v5 11/11] qtest/bios-tables-test: Update tables for smmuv3 tests Shameer Kolothum via
2025-06-23 12:00 ` Jonathan Cameron via
2025-06-27 12:36 ` Eric Auger
2025-06-30 7:11 ` Shameerali Kolothum Thodi via
2025-07-01 6:35 ` Eric Auger
2025-06-27 12:36 ` [PATCH v5 00/11] hw/arm/virt: Add support for user creatable SMMUv3 device Eric Auger
2025-06-30 7:12 ` Shameerali Kolothum Thodi via
2025-07-01 6:37 ` Eric Auger
2025-07-02 1:01 ` Nathan Chen
2025-07-02 15:08 ` Shameerali Kolothum Thodi via [this message]
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