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[174.21.76.141]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1fac159686csm86431835ad.266.2024.07.02.09.26.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 02 Jul 2024 09:26:30 -0700 (PDT) Message-ID: Date: Tue, 2 Jul 2024 09:26:28 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/3] util: Add cpuinfo support for riscv From: Richard Henderson To: qemu-devel@nongnu.org Cc: brad@comstyle.com, Alistair.Francis@wdc.com, palmer@dabbelt.com, qemu-riscv@nongnu.org, Daniel Henrique Barboza , Bin Meng References: <20240627180350.128575-1-richard.henderson@linaro.org> Content-Language: en-US In-Reply-To: <20240627180350.128575-1-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Ping, particularly from the riscv folk. I'm keen to get on Brad's *BSD patches in my next PR. r~ On 6/27/24 11:03, Richard Henderson wrote: > Do cpu feature detection in util, like other hosts. > Support the OpenBSD ucontext_t. > Support the Linux __riscv_hwprobe syscall. > > r~ > > Richard Henderson (3): > util/cpuinfo-riscv: Support host/cpuinfo.h for riscv > util/cpuinfo-riscv: Support OpenBSD signal frame > util/cpuinfo-riscv: Use linux __riscv_hwprobe syscall > > meson.build | 6 ++ > host/include/riscv/host/cpuinfo.h | 23 ++++++ > tcg/riscv/tcg-target.h | 46 ++++++------ > util/cpuinfo-riscv.c | 118 ++++++++++++++++++++++++++++++ > tcg/riscv/tcg-target.c.inc | 84 ++------------------- > util/meson.build | 2 + > 6 files changed, 178 insertions(+), 101 deletions(-) > create mode 100644 host/include/riscv/host/cpuinfo.h > create mode 100644 util/cpuinfo-riscv.c >