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From: Sairaj Kodilkar <sarunkod@amd.com>
To: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>,
	<qemu-devel@nongnu.org>
Cc: <pbonzini@redhat.com>, <richard.henderson@linaro.org>,
	<eduardo@habkost.net>, <peterx@redhat.com>, <david@redhat.com>,
	<philmd@linaro.org>, <mst@redhat.com>,
	<marcel.apfelbaum@gmail.com>, <alex.williamson@redhat.com>,
	<vasant.hegde@amd.com>, <suravee.suthikulpanit@amd.com>,
	<santosh.shukla@amd.com>, <Wei.Huang2@amd.com>,
	<joao.m.martins@oracle.com>, <boris.ostrovsky@oracle.com>
Subject: Re: [PATCH 14/18] amd_iommu: Toggle address translation on device table entry invalidation
Date: Tue, 22 Apr 2025 18:18:57 +0530	[thread overview]
Message-ID: <ead40e48-868a-4ee6-a23e-ee11e1047880@amd.com> (raw)
In-Reply-To: <20250414020253.443831-15-alejandro.j.jimenez@oracle.com>



On 4/14/2025 7:32 AM, Alejandro Jimenez wrote:
> A guest must issue an INVALIDATE_DEVTAB_ENTRY command after changing a
> Device Table entry (DTE) e.g. after attaching a device and setting up
> its DTE. When intercepting this event, determine if the DTE has been
> configured for paging or not, and toggle the appropriate memory regions
> to allow DMA address translation for the address space if needed.
> 
> Signed-off-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
> ---
>   hw/i386/amd_iommu.c | 68 ++++++++++++++++++++++++++++++++++++++++++++-
>   1 file changed, 67 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
> index 3bfa08419ffe..abdd67f6b12c 100644
> --- a/hw/i386/amd_iommu.c
> +++ b/hw/i386/amd_iommu.c
> @@ -101,6 +101,8 @@ static void amdvi_sync_shadow_page_table_range(AMDVIAddressSpace *as,
>                                                  uint64_t *dte, hwaddr addr,
>                                                  uint64_t size, bool send_unmap);
>   static void amdvi_address_space_unmap(AMDVIAddressSpace *as, IOMMUNotifier *n);
> +static void amdvi_address_space_sync(AMDVIAddressSpace *as);
> +static void amdvi_switch_address_space(AMDVIAddressSpace *amdvi_as);
>   
>   uint64_t amdvi_extended_feature_register(AMDVIState *s)
>   {
> @@ -432,7 +434,15 @@ static void amdvi_completion_wait(AMDVIState *s, uint64_t *cmd)
>       trace_amdvi_completion_wait(addr, data);
>   }
>   
> -/* log error without aborting since linux seems to be using reserved bits */
> +/*
> + * A guest driver must issue the INVALIDATE_DEVTAB_ENTRY command to the IOMMU
> + * after changing a Device Table entry. We can use this fact to detect when a
> + * Device Table entry is created for a device attached to a paging domain and
> + * and enable the corresponding IOMMU memory region to allow for DMA
> + * translation if appropriate.
> + *
> + * log error without aborting since linux seems to be using reserved bits
> + */
>   static void amdvi_inval_devtab_entry(AMDVIState *s, uint64_t *cmd)
>   {
>       uint16_t devid = cpu_to_le16((uint16_t)extract64(cmd[0], 0, 16));
> @@ -442,6 +452,62 @@ static void amdvi_inval_devtab_entry(AMDVIState *s, uint64_t *cmd)
>           amdvi_log_illegalcom_error(s, extract64(cmd[0], 60, 4),
>                                      s->cmdbuf + s->cmdbuf_head);
>       }
> +
> +    /*
> +     * Convert the devid encoded in the command to a bus and devfn in
> +     * order to retrieve the corresponding address space.
> +     */
> +    uint8_t bus_num, devfn, dte_mode;
> +    AMDVIAddressSpace *as;
> +    uint64_t dte[4] = { 0 };
> +    IOMMUNotifier *n;
> +    int ret;
> +
> +    bus_num = PCI_BUS_NUM(devid);
> +    devfn = devid & 0xff;
> +
> +    /*
> +     * The main buffer of size (AMDVIAddressSpace *) * (PCI_BUS_MAX) has already
> +     * been allocated within AMDVIState, but must be careful to not access
> +     * unallocated devfn.
> +     */
> +    if (!s->address_spaces[bus_num] || !s->address_spaces[bus_num][devfn]) {
> +        return;
> +    }
> +    as = s->address_spaces[bus_num][devfn];
> +
> +    ret = amdvi_as_to_dte(as, dte);
> +
> +    if (!ret) {
> +        dte_mode = (dte[0] >> AMDVI_DEV_MODE_RSHIFT) & AMDVI_DEV_MODE_MASK;
> +    }
> +
> +    if ((ret < 0) || (!ret && !dte_mode)) {
> +        /*
> +         * The DTE could not be retrieved, it is not valid, or it is not setup
> +         * for paging. In either case, ensure that if paging was previously in
> +         * use then switch to use the no_dma memory region, and invalidate all
> +         * existing mappings.
> +         */
> +        if (as->addr_translation) {
> +            as->addr_translation = false;
> +
> +            amdvi_switch_address_space(as);
> +
> +            IOMMU_NOTIFIER_FOREACH(n, &as->iommu) {
> +                amdvi_address_space_unmap(as, n);
> +            }

Hi,
I think amdvi_switch_address_space() should come after
amdvi_address_space_unmap(). amdvi_switch_address_space() unregister the
VFIO notifier, hence mr->iommu_notify list is empty and we do not unmap
the shadow page table.

Code works fine because eventually vfio_iommu_map_notify maps
entire the address space, but we should keep the right ordering.

Regards
Sairaj Kodilkar

> +        }
> +    } else if (!as->addr_translation) {
> +        /*
> +         * Installing a DTE that enables translation where it wasn't previously
> +         * active. Activate the DMA memory region.
> +         */
> +        as->addr_translation = true;
> +        amdvi_switch_address_space(as);
> +        amdvi_address_space_sync(as);
> +    }
> +
>       trace_amdvi_devtab_inval(PCI_BUS_NUM(devid), PCI_SLOT(devid),
>                                PCI_FUNC(devid));
>   }



  reply	other threads:[~2025-04-22 12:49 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-14  2:02 [PATCH 00/18] AMD vIOMMU: DMA remapping support for VFIO devices Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 01/18] memory: Adjust event ranges to fit within notifier boundaries Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 02/18] amd_iommu: Add helper function to extract the DTE Alejandro Jimenez
2025-04-16 11:36   ` Sairaj Kodilkar
2025-04-16 13:29     ` Alejandro Jimenez
2025-04-16 18:50       ` Michael S. Tsirkin
2025-04-16 22:37         ` Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 03/18] amd_iommu: Add support for IOMMU notifier Alejandro Jimenez
2025-04-16 12:14   ` Sairaj Kodilkar
2025-04-16 22:17     ` Alejandro Jimenez
2025-04-17 10:19       ` Sairaj Kodilkar
2025-04-17 16:21         ` Alejandro Jimenez
2025-04-17 16:34           ` Michael S. Tsirkin
2025-04-18  6:33           ` Sairaj Kodilkar
2025-04-14  2:02 ` [PATCH 04/18] amd_iommu: Unmap all address spaces under the AMD IOMMU on reset Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 05/18] amd_iommu: Toggle memory regions based on address translation mode Alejandro Jimenez
2025-04-22 12:17   ` Sairaj Kodilkar
2025-04-28 21:10     ` Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 06/18] amd_iommu: Set all address spaces to default translation mode on reset Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 07/18] amd_iommu: Return an error when unable to read PTE from guest memory Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 08/18] amd_iommu: Helper to decode size of page invalidation command Alejandro Jimenez
2025-04-22 12:26   ` Sairaj Kodilkar
2025-04-28 21:16     ` Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 09/18] amd_iommu: Add helpers to walk AMD v1 Page Table format Alejandro Jimenez
2025-04-17 12:40   ` CLEMENT MATHIEU--DRIF
2025-04-17 15:27     ` Alejandro Jimenez
2025-04-18  5:30       ` CLEMENT MATHIEU--DRIF
2025-04-23  6:28         ` Sairaj Kodilkar
2025-04-14  2:02 ` [PATCH 10/18] amd_iommu: Add a page walker to sync shadow page tables on invalidation Alejandro Jimenez
2025-04-17 15:14   ` Ethan MILON
2025-04-17 15:45     ` Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 11/18] amd_iommu: Sync shadow page tables on page invalidation Alejandro Jimenez
2025-04-22 12:38   ` Sairaj Kodilkar
2025-04-22 12:38   ` Sairaj Kodilkar
2025-04-29 19:47     ` Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 12/18] amd_iommu: Add replay callback Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 13/18] amd_iommu: Invalidate address translations on INVALIDATE_IOMMU_ALL Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 14/18] amd_iommu: Toggle address translation on device table entry invalidation Alejandro Jimenez
2025-04-22 12:48   ` Sairaj Kodilkar [this message]
2025-04-29 20:45     ` Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 15/18] amd_iommu: Use iova_tree records to determine large page size on UNMAP Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 16/18] amd_iommu: Do not assume passthrough translation when DTE[TV]=0 Alejandro Jimenez
2025-04-23  6:06   ` Sairaj Kodilkar
2025-04-14  2:02 ` [PATCH 17/18] amd_iommu: Refactor amdvi_page_walk() to use common code for page walk Alejandro Jimenez
2025-04-14  2:02 ` [PATCH 18/18] amd_iommu: Do not emit I/O page fault events during replay() Alejandro Jimenez
2025-04-23  6:18   ` Sairaj Kodilkar
2025-04-23 10:45 ` [PATCH 00/18] AMD vIOMMU: DMA remapping support for VFIO devices Sairaj Kodilkar
2025-04-23 10:56   ` Sairaj Kodilkar
2025-04-24 11:49     ` Joao Martins

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