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[174.21.76.141]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-708042be4e6sm3454740b3a.153.2024.06.29.09.21.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 29 Jun 2024 09:21:42 -0700 (PDT) Message-ID: Date: Sat, 29 Jun 2024 09:21:40 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 7/7] tests/tcg/arm: Manually bit-cast half-precision numbers To: Akihiko Odaki , Peter Maydell , =?UTF-8?Q?Alex_Benn=C3=A9e?= , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20240629-tcg-v3-0-fa57918bdf09@daynix.com> <20240629-tcg-v3-7-fa57918bdf09@daynix.com> Content-Language: en-US From: Richard Henderson In-Reply-To: <20240629-tcg-v3-7-fa57918bdf09@daynix.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 6/29/24 01:56, Akihiko Odaki wrote: > clang version 18.1.6 does not allow specifying an integer as the value > of a single-precision register. Manually bit-cast into float with vmov > first. > > Signed-off-by: Akihiko Odaki > --- > tests/tcg/arm/fcvt.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/tests/tcg/arm/fcvt.c b/tests/tcg/arm/fcvt.c > index f631197287a1..5263f607b59c 100644 > --- a/tests/tcg/arm/fcvt.c > +++ b/tests/tcg/arm/fcvt.c > @@ -355,7 +355,9 @@ static void convert_half_to_single(void) > > print_half_number(i, input); > #if defined(__arm__) > - asm("vcvtb.f32.f16 %0, %1" : "=w" (output) : "x" ((uint32_t)input)); > + float tmp; > + asm("vmov %0, %1" : "=w" (tmp) : "r" (input)); > + asm("vcvtb.f32.f16 %0, %1" : "=w" (output) : "x" (tmp)); > #else > asm("fcvt %s0, %h1" : "=w" (output) : "w" (input)); > #endif Better as #if defined(__arm__) - asm("vcvtb.f32.f16 %0, %1" : "=w" (output) : "x" ((uint32_t)input)); + /* + * Clang refuses to allocate an integer to a fp register. + * Perform the move from a general register by hand. + */ + asm("vmov %0, %1\n\t" + "vcvtb.f32.f16 %0, %0" : "=w" (output) : "r" (input)); #else without the C temporary. With that, Reviewed-by: Richard Henderson r~