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[88.28.30.92]) by smtp.gmail.com with ESMTPSA id l13-20020adfe58d000000b002c569acab1esm10858831wrm.73.2023.03.06.13.30.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 06 Mar 2023 13:30:27 -0800 (PST) Message-ID: Date: Mon, 6 Mar 2023 22:30:23 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH 00/23] Fix NB_MMU_MODES to 16 Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= To: Anton Johansson , qemu-devel@nongnu.org Cc: ale@rev.ng, richard.henderson@linaro.org, pbonzini@redhat.com, eduardo@habkost.net, peter.maydell@linaro.org, mrolnik@gmail.com, tsimpson@quicinc.com, gaosong@loongson.cn, yangxiaojuan@loongson.cn, edgar.iglesias@gmail.com, shorne@gmail.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, ysato@users.sourceforge.jp, mark.cave-ayland@ilande.co.uk, atar4qemu@gmail.com, kbastian@mail.uni-paderborn.de References: <20230306175230.7110-1-anjo@rev.ng> <4a9d742b-3069-09f3-3182-1c923ebb6080@linaro.org> In-Reply-To: <4a9d742b-3069-09f3-3182-1c923ebb6080@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 6/3/23 19:56, Philippe Mathieu-Daudé wrote: > On 6/3/23 18:52, Anton Johansson wrote: >> This patchset fixes NB_MMU_MODES to 16 for all targets, meaning the >> macro is no longer target-specific.  16 mmu modes is large enough to >> cover all currently supported targets (12 arm, 10 ppc, ...), and is the >> maxiumum supported by the softmmu tlb api. >> >> As mentioned by Richard in response to our RFC, softmmu tlbs are >> dynamically resized and so the overhead of an unused mmu index is fairly >> low. >> >> The grand goal is to allow for heterogeneous QEMU binaries >> consisting of multiple frontends. >> >> RFC: >> https://lists.nongnu.org/archive/html/qemu-devel/2022-12/msg04518.html >> >> Anton Johansson (23): >>    include/exec: Set default `NB_MMU_MODES` to 16 >>    target/alpha: Remove `NB_MMU_MODES` define >>    target/arm: Remove `NB_MMU_MODES` define >>    target/avr: Remove `NB_MMU_MODES` define >>    target/cris: Remove `NB_MMU_MODES` define >>    target/hexagon: Remove `NB_MMU_MODES` define >>    target/hppa: Remove `NB_MMU_MODES` define >>    target/i386: Remove `NB_MMU_MODES` define >>    target/loongarch: Remove `NB_MMU_MODES` define >>    target/m68k: Remove `NB_MMU_MODES` define >>    target/microblaze: Remove `NB_MMU_MODES` define >>    target/mips: Remove `NB_MMU_MODES` define >>    target/nios2: Remove `NB_MMU_MODES` define >>    target/openrisc: Remove `NB_MMU_MODES` define >>    target/ppc: Remove `NB_MMU_MODES` define >>    target/riscv: Remove `NB_MMU_MODES` define >>    target/rx: Remove `NB_MMU_MODES` define >>    target/s390x: Remove `NB_MMU_MODES` define >>    target/sh4: Remove `NB_MMU_MODES` define >>    target/sparc: Remove `NB_MMU_MODES` define >>    target/tricore: Remove `NB_MMU_MODES` define >>    target/xtensa: Remove `NB_MMU_MODES` define >>    include/exec: Remove guards around `NB_MMU_MODES` > > As 24/23 we can remove the assertion in qemu_plugin_get_hwaddr(). > > Then NB_MMU_MODES is only used by CPUTLB in "exec/cpu-defs.h" and > in accel/tcg/cputlb.c. I forgot, series: Reviewed-by: Philippe Mathieu-Daudé