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Thu, 5 Dec 2019 11:50:38 +0000 (UTC) Subject: Re: [PATCH for-5.0 3/8] acpi: cpuhp: spec: clarify 'CPU selector' register usage and endianness To: Igor Mammedov , qemu-devel@nongnu.org References: <1575479147-6641-1-git-send-email-imammedo@redhat.com> <1575479147-6641-4-git-send-email-imammedo@redhat.com> From: Laszlo Ersek Message-ID: Date: Thu, 5 Dec 2019 12:50:37 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <1575479147-6641-4-git-send-email-imammedo@redhat.com> Content-Language: en-US X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-MC-Unique: BGzzT2h7NsSF53gSXj9O9A-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 205.139.110.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, philmd@redhat.com, mst@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/04/19 18:05, Igor Mammedov wrote: > * Move reserved registers to the top of the section, so reader would be > aware of effects when reading registers description. > * State registers endianness explicitly at the beginning of the section > * Describe registers behavior in case of 'CPU selector' register contains > value that doesn't point to a possible CPU. > > Signed-off-by: Igor Mammedov > --- > docs/specs/acpi_cpu_hotplug.txt | 18 ++++++++++++------ > 1 file changed, 12 insertions(+), 6 deletions(-) > > diff --git a/docs/specs/acpi_cpu_hotplug.txt b/docs/specs/acpi_cpu_hotplug.txt > index ee219c8..4e65286 100644 > --- a/docs/specs/acpi_cpu_hotplug.txt > +++ b/docs/specs/acpi_cpu_hotplug.txt > @@ -30,6 +30,18 @@ Register block base address: > Register block size: > ACPI_CPU_HOTPLUG_REG_LEN = 12 > > +All accesses to registers described below, imply little-endian byte order. > + > +Reserved resisters behavior: > + - write accesses are ignored > + - read accesses return all bits set to 0. > + > +The last stored value in 'CPU selector' must refer to a possible CPU, otherwise > + - reads from any register return 0 > + - writes to any other register are ignored until valid value is stored into it > +On QEMU start, 'CPU selector' is initialized to a valid value, on reset it > +keeps the current value. > + > read access: > offset: > [0x0-0x3] reserved > @@ -86,9 +98,3 @@ write access: > ACPI_DEVICE_OST QMP event from QEMU to external applications > with current values of OST event and status registers. > other values: reserved > - > -Selecting CPU device beyond possible range has no effect on platform: > - - write accesses to CPU hot-plug registers not documented above are > - ignored > - - read accesses to CPU hot-plug registers not documented above return > - all bits set to 0. > Reviewed-by: Laszlo Ersek