From: "Hervé Poussineau" <hpoussin@reactos.org>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
david@gibson.dropbear.id.au, pbonzini@redhat.com,
famz@redhat.com, qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing
Date: Wed, 12 Sep 2018 21:23:33 +0200 [thread overview]
Message-ID: <ebdf2af9-e1fe-e570-9b8a-b806f96b023b@reactos.org> (raw)
In-Reply-To: <20180910204631.24106-1-mark.cave-ayland@ilande.co.uk>
Le 10/09/2018 à 22:46, Mark Cave-Ayland a écrit :
> According to the PReP specification section 6.1.6 "System Interrupt
> Assignments", all PCI interrupts are routed via IRQ 15.
>
> In the case of the 40p machine this isn't quite true in that it has a routing
> quirk: the LSI SCSI device is always routed to IRQ 13. At least Linux and
> NetBSD compare the model name presented by the firmware to "IBM PPS Model
> 6015", and if it matches will active this quirk.
>
> In order for guest OSs to make use of the fixed IRQ routing, the model name
> in the residual data must be changed in OpenBIOS using the diff below:
>
> diff --git a/arch/ppc/qemu/context.c b/arch/ppc/qemu/context.c
> index 06e0122..5815895 100644
> --- a/arch/ppc/qemu/context.c
> +++ b/arch/ppc/qemu/context.c
> @@ -111,7 +111,7 @@ static void *
> residual_build(uint32_t memsize, uint32_t load_base, uint32_t load_size)
> {
> residual_t *res;
> - const unsigned char model[] = "Qemu\0PPC\0";
> + const unsigned char model[] = "IBM PPS Model 6015\0";
> int i;
>
> res = malloc(sizeof(residual_t));
>
> With the above OpenBIOS patch applied as well as this patchset, it is now
> possible to boot the sandalfoot zImage all the way through to a working
> userspace when using OpenBIOS.
>
> (Note: this patchset requires the changes in my previous patchset "scsi:
> replace lsi53c895a_create() and lsi53c810_create() functions)
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> Based-on: <20180907125653.5010-1-mark.cave-ayland@ilande.co.uk>
>
> v3:
> - Add external IRQ to LSI SCSI device instead of hacking the PCI interrupt
> routing as suggested by David
> - Rebase onto the patches from v2 already applied to ppc-for-3.1
>
> v2:
> - Add OR gate as recommended by Zoltan and implement routing quirk by hacking
> the raven PCI interrupt routing
>
>
> Mark Cave-Ayland (2):
> lsi53c895a: add optional external IRQ via qdev
> 40p: add fixed IRQ routing for LSI SCSI device
>
> hw/ppc/prep.c | 11 ++++++-----
> hw/scsi/lsi53c895a.c | 16 ++++++++++++++--
> 2 files changed, 20 insertions(+), 7 deletions(-)
>
Reviewed-by: Hervé Poussineau <hpoussin@reactos.org>
Tested-by: Hervé Poussineau <hpoussin@reactos.org>
prev parent reply other threads:[~2018-09-12 19:29 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-10 20:46 [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing Mark Cave-Ayland
2018-09-10 20:46 ` [Qemu-devel] [PATCH v3 1/2] lsi53c895a: add optional external IRQ via qdev Mark Cave-Ayland
2018-09-11 1:27 ` David Gibson
2018-09-11 6:38 ` Fam Zheng
2018-09-11 13:01 ` Paolo Bonzini
2018-09-10 20:46 ` [Qemu-devel] [PATCH v3 2/2] 40p: add fixed IRQ routing for LSI SCSI device Mark Cave-Ayland
2018-09-11 1:27 ` David Gibson
2018-09-13 0:24 ` David Gibson
2018-09-13 4:21 ` Mark Cave-Ayland
2018-09-13 9:07 ` Paolo Bonzini
2018-09-13 20:56 ` Philippe Mathieu-Daudé
2018-09-12 19:23 ` Hervé Poussineau [this message]
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