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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>, qemu-devel@nongnu.org
Cc: Huacai Chen <chenhc@lemote.com>,
	Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>,
	Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
	Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PATCH-for-5.2] target/mips: Report unimplemented cache() operations
Date: Thu, 6 Aug 2020 22:11:43 +0200	[thread overview]
Message-ID: <ec0ff553-a5e7-6c93-5ab3-093721b044a6@amsat.org> (raw)
In-Reply-To: <e55da0ff-e88c-f2f4-0430-32255f7e58fe@flygoat.com>

On 8/6/20 8:01 PM, Jiaxun Yang wrote:
> 在 2020/8/6 下午8:26, Philippe Mathieu-Daudé 写道:
>> We only implement the Index[Store/Load]Tag from the 'cache' opcode.
>> Instead of ignoring the other cache operations, report them as
>> unimplemented.
> 
> Hmm, I don't think we have anything to do with Invalidate/Writeback etc.
> opcodes
> in QEMU. Why do we log this?

I'm noticed this code is run on Linux 3.3.8 (4KEc):

    8880:       3082000f        andi    v0,a0,0xf
    8884:       10800008        beqz    a0,88a8
    8888:       00a21021        addu    v0,a1,v0
    888c:       08002227        j       889c
    8890:       00001821        move    v1,zero
    8894:       bcf90000        cache   0x19,0(a3)
    8898:       24630010        addiu   v1,v1,16
    889c:       0062302b        sltu    a2,v1,v0
    88a0:       14c0fffc        bnez    a2,8894
    88a4:       00833821        addu    a3,a0,v1
    88a8:       03e00008        jr      ra
    88ac:       00000000        nop

Why silently ignore the opcode is not implemented instead of logging it?

> 
> Thanks.
> 
> - Jiaxun
> 
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>>   target/mips/op_helper.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
>> index 9552b280e0..7f87e57c8e 100644
>> --- a/target/mips/op_helper.c
>> +++ b/target/mips/op_helper.c
>> @@ -1583,6 +1583,8 @@ void helper_cache(CPUMIPSState *env,
>> target_ulong addr, uint32_t op)
>>           /* Index Load Tag */
>>           memory_region_dispatch_read(env->itc_tag, index,
>> &env->CP0_TagLo,
>>                                       MO_64, MEMTXATTRS_UNSPECIFIED);
>> +    } else {
>> +        qemu_log_mask(LOG_UNIMP, "cache %u\n", op);
>>       }
>>   #endif
>>   }
> 


  reply	other threads:[~2020-08-06 20:31 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-06 12:26 [PATCH-for-5.2] target/mips: Report unimplemented cache() operations Philippe Mathieu-Daudé
2020-08-06 18:01 ` Jiaxun Yang
2020-08-06 20:11   ` Philippe Mathieu-Daudé [this message]
2020-08-06 20:51     ` Peter Maydell
2020-08-06 21:37       ` Philippe Mathieu-Daudé
2020-08-10 17:21         ` Philippe Mathieu-Daudé
2020-08-13 10:58           ` Jiaxun Yang
2020-08-13 15:23           ` Jiaxun Yang
2020-08-13 17:59             ` Philippe Mathieu-Daudé
2020-08-07  7:57       ` Jiaxun Yang

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