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From: "Murilo Opsfelder Araújo" <muriloo@linux.vnet.ibm.com>
To: Suraj Jitindar Singh <sjitindarsingh@gmail.com>, qemu-ppc@nongnu.org
Cc: paulus@ozlabs.org, qemu-devel@nongnu.org, david@gibson.dropbear.id.au
Subject: Re: [Qemu-devel] [Qemu-ppc] [QEMU-PPC] [RFC 3/3] target/ppc: Add H-Call H_GET_CPU_CHARACTERISTICS
Date: Tue, 9 Jan 2018 09:19:56 -0200	[thread overview]
Message-ID: <ec42a7c1-47f9-ff57-8bdc-bd8d26d9a522@linux.vnet.ibm.com> (raw)
In-Reply-To: <20180109092103.18458-4-sjitindarsingh@gmail.com>

On 01/09/2018 07:21 AM, Suraj Jitindar Singh wrote:
> The new H-Call H_GET_CPU_CHARACTERISTICS is used by the guest to query
> behaviours and available characteristics of the cpu.
> 
> Implement the handler for this new H-Call which formulates its response
> based on the setting of the new capabilities added in the previous
> patch.
> 
> Note: Currently we return H_FUNCTION under TCG which will direct the
>       guest to fall back to doing a displacement flush
> 
> Discussion:
> Is TCG affected?
> Is there any point in telling the guest to do these workarounds on TCG
> given they're unlikely to translate to host instructions which have the
> desired effect?

Hi, Suraj.

What if this is left to the cover letter?

> ---
>  hw/ppc/spapr_hcall.c   | 81 ++++++++++++++++++++++++++++++++++++++++++++++++++
>  include/hw/ppc/spapr.h |  1 +
>  2 files changed, 82 insertions(+)
> 
> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> index 51eba52e86..b62b47c8d9 100644
> --- a/hw/ppc/spapr_hcall.c
> +++ b/hw/ppc/spapr_hcall.c
> @@ -1654,6 +1654,84 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
>      return H_SUCCESS;
>  }
> 
> +#define CPU_CHARACTERISTIC_SPEC_BARRIER         (1ULL << (63 - 0))
> +#define CPU_CHARACTERISTIC_BCCTR_SERIAL         (1ULL << (63 - 1))
> +#define CPU_CHARACTERISTIC_ORI_L1_CACHE         (1ULL << (63 - 2))
> +#define CPU_CHARACTERISTIC_MTTRIG_L1_CACHE      (1ULL << (63 - 3))
> +#define CPU_CHARACTERISTIC_L1_CACHE_PRIV        (1ULL << (63 - 4))
> +#define CPU_CHARACTERISTIC_BRANCH_HINTS         (1ULL << (63 - 5))
> +#define CPU_CHARACTERISTIC_MTTRIG_THR_RECONF    (1ULL << (63 - 6))
> +#define CPU_BEHAVIOUR_FAVOUR_SECURITY           (1ULL << (63 - 0))
> +#define CPU_BEHAVIOUR_L1_CACHE_FLUSH            (1ULL << (63 - 1))
> +#define CPU_BEHAVIOUR_SPEC_BARRIER              (1ULL << (63 - 2))

Can PPC_BIT be used here?

Cheers
Murilo

  reply	other threads:[~2018-01-09 11:20 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-09  9:21 [Qemu-devel] [QEMU-PPC] [RFC 0/3] target/ppc: Rework spapr_caps Suraj Jitindar Singh
2018-01-09  9:21 ` [Qemu-devel] [QEMU-PPC] [RFC 1/3] hw/ppc/spapr_caps: Rework spapr_caps to use uint8 internal representation Suraj Jitindar Singh
2018-01-09 11:13   ` [Qemu-devel] [Qemu-ppc] " Murilo Opsfelder Araújo
2018-01-10  0:21     ` Suraj Jitindar Singh
2018-01-09 12:07   ` Andrea Bolognani
2018-01-10  0:19     ` Suraj Jitindar Singh
2018-01-10  2:51       ` David Gibson
2018-01-10  4:13   ` [Qemu-devel] " David Gibson
2018-01-12  2:19     ` Suraj Jitindar Singh
2018-01-09  9:21 ` [Qemu-devel] [QEMU-PPC] [RFC 2/3] hw/spapr/spapr_caps: Add new caps safe_[cache/bounds_check/indirect_branch] Suraj Jitindar Singh
2018-01-09 11:15   ` [Qemu-devel] [Qemu-ppc] " Murilo Opsfelder Araújo
2018-01-10  0:25     ` Suraj Jitindar Singh
2018-01-09 12:02   ` [Qemu-devel] " joserz
2018-01-10  0:23     ` Suraj Jitindar Singh
2018-01-10  4:54   ` David Gibson
2018-01-09  9:21 ` [Qemu-devel] [QEMU-PPC] [RFC 3/3] target/ppc: Add H-Call H_GET_CPU_CHARACTERISTICS Suraj Jitindar Singh
2018-01-09 11:19   ` Murilo Opsfelder Araújo [this message]
2018-01-10  0:26     ` [Qemu-devel] [Qemu-ppc] " Suraj Jitindar Singh
2018-01-10  5:02   ` [Qemu-devel] " David Gibson

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