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[173.197.98.118]) by smtp.gmail.com with ESMTPSA id dc6-20020a056a0035c600b005897f5436c0sm2971483pfb.118.2023.01.27.10.21.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Jan 2023 10:21:16 -0800 (PST) Message-ID: Date: Fri, 27 Jan 2023 08:21:11 -1000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH 3/5] target/tricore: Fix RRPW_DEXTR Content-Language: en-US To: Bastian Koppelmann , qemu-devel@nongnu.org Cc: anton.kochkov@proton.me References: <20230127120328.2520624-1-kbastian@mail.uni-paderborn.de> <20230127120328.2520624-4-kbastian@mail.uni-paderborn.de> From: Richard Henderson In-Reply-To: <20230127120328.2520624-4-kbastian@mail.uni-paderborn.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.148, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/27/23 02:03, Bastian Koppelmann wrote: > if we used const16 == 0 we would crash qemu with the error: > > ../tcg/tcg-op.c:196: tcg_gen_shri_i32: Assertion `arg2 >= 0 && arg2 < 32' failed > > This is a special case anyways as we can directly return cpu_gpr_d[r1] > as this is the most significant word an nothing is shifted. > > Signed-off-by: Bastian Koppelmann > --- > target/tricore/translate.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target/tricore/translate.c b/target/tricore/translate.c > index 6149d4f5c0..62128c6aae 100644 > --- a/target/tricore/translate.c > +++ b/target/tricore/translate.c > @@ -8708,6 +8708,8 @@ static void decode_32Bit_opc(DisasContext *ctx) > const16 = MASK_OP_RRPW_POS(ctx->opcode); > if (r1 == r2) { > tcg_gen_rotli_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], const16); > + } else if (const16 == 0) { > + tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r1]); > } else { > temp = tcg_temp_new(); > tcg_gen_shli_tl(temp, cpu_gpr_d[r1], const16); While correct, this entire operation is tcg_gen_extract2_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], cpu_gpr_d[r1], 32 - const16); which will take care of your two special cases as well. r~