From: Richard Henderson <richard.henderson@linaro.org>
To: Jerome Forissier <jerome.forissier@linaro.org>,
Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org, qemu-stable@nongnu.org
Subject: Re: [PATCH] target/arm: allow setting SCR_EL3.EnTP2 when FEAT_SME is implemented
Date: Tue, 4 Oct 2022 07:56:16 -0700 [thread overview]
Message-ID: <ed34b9a4-5470-786d-9958-dfd1df398ef0@linaro.org> (raw)
In-Reply-To: <20221004072354.27037-1-jerome.forissier@linaro.org>
On 10/4/22 00:23, Jerome Forissier wrote:
> Updates write_scr() to allow setting SCR_EL3.EnTP2 when FEAT_SME is
> implemented. SCR_EL3 being a 64-bit register, valid_mask is changed
> to uint64_t and the SCR_* constants in target/arm/cpu.h are extended
> to 64-bit so that masking and bitwise not (~) behave as expected.
>
> This enables booting Linux with Trusted Firmware-A at EL3 with
> "-M virt,secure=on -cpu max".
>
> Cc:qemu-stable@nongnu.org
> Fixes: 78cb9776662a ("target/arm: Enable SME for -cpu max")
> Signed-off-by: Jerome Forissier<jerome.forissier@linaro.org>
> ---
> target/arm/cpu.h | 54 ++++++++++++++++++++++-----------------------
> target/arm/helper.c | 5 ++++-
> 2 files changed, 31 insertions(+), 28 deletions(-)
Whoops, sorry about that.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2022-10-04 15:38 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-04 7:23 [PATCH] target/arm: allow setting SCR_EL3.EnTP2 when FEAT_SME is implemented Jerome Forissier
2022-10-04 11:07 ` Andre Przywara
2022-10-04 14:56 ` Richard Henderson [this message]
2022-10-04 15:17 ` Peter Maydell
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