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[174.21.76.141]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7067eb5b970sm935673b3a.177.2024.06.23.10.48.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 23 Jun 2024 10:48:32 -0700 (PDT) Message-ID: Date: Sun, 23 Jun 2024 10:48:30 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 22/23] Add set_mcontext function for ARM AArch64 in bsd-user To: Warner Losh Cc: Ajeet Singh , qemu-devel@nongnu.org, Ajeet Singh , Stacey Son References: <20240617185804.25075-1-itachis@FreeBSD.org> <20240617185804.25075-23-itachis@FreeBSD.org> <8bf36c67-070e-4e04-987b-c64b502ed62d@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 6/23/24 08:54, Warner Losh wrote: > > > On Tue, Jun 18, 2024 at 4:51 PM Richard Henderson > wrote: > > On 6/17/24 11:58, Ajeet Singh wrote: > > From: Stacey Son > > > > The function copies register values from the provided target_mcontext_t > > structure to the CPUARMState registers > > > > Signed-off-by: Stacey Son > > Signed-off-by: Ajeet Singh > > --- > >   bsd-user/aarch64/signal.c | 22 ++++++++++++++++++++++ > >   1 file changed, 22 insertions(+) > > > > diff --git a/bsd-user/aarch64/signal.c b/bsd-user/aarch64/signal.c > > index 43c886e603..13faac8ce6 100644 > > --- a/bsd-user/aarch64/signal.c > > +++ b/bsd-user/aarch64/signal.c > > @@ -95,3 +95,25 @@ abi_long setup_sigframe_arch(CPUARMState *env, abi_ulong frame_addr, > >       return 0; > >   } > > > > +/* > > + * Compare to set_mcontext() in arm64/arm64/machdep.c > > + * Assumes that the memory is locked if frame points to user memory. > > + */ > > +abi_long set_mcontext(CPUARMState *regs, target_mcontext_t *mcp, int srflag) > > +{ > > +    int err = 0, i; > > +    const uint64_t *gr = mcp->mc_gpregs.gp_x; > > + > > +    for (i = 0; i < 30; i++) { > > +        regs->xregs[i] = tswap64(gr[i]); > > +    } > > + > > +    regs->xregs[TARGET_REG_SP] = tswap64(mcp->mc_gpregs.gp_sp); > > +    regs->xregs[TARGET_REG_LR] = tswap64(mcp->mc_gpregs.gp_lr); > > +    regs->pc = mcp->mc_gpregs.gp_elr; > > tswap. > > > So "regs->pc = tswap64(mcp->mc_gpregs.gp_elr)"  then? Yes. > > > +    pstate_write(regs, mcp->mc_gpregs.gp_spsr); > > + > > +    /* XXX FP? */ > > Similarly, see target_restore_fpsimd_record. > > > Since neither this, nor the get_mcontext is written for FP on upstream yet, can we do > those as a followup commit? Yes. r~