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charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Inès, On 7/12/23 22:30, ~inesvarhol wrote: > This patch adds a new STM32L4x5 EXTI device and is part > of a series implementing the STM32L4x5 with a few peripherals. > > The patch is split up in 3 commits : > - implementing the EXTI device > - adding tests (that fail in this commit) > - connecting the EXTI device to the SoC (the tests pass in this commit) > > Thank you Alistair for the review and very helpful answers ! > > Sincerely, > Ines Varhol > > Changes from v3 to non-RFC v1: > - separating the patch in 3 commits > - justifying in the commit message why we implement a new > model instead of changing the existing stm32f4xx_exti > - changed irq_raise to irq_pulse in register SWIERx write (in > stm32l4x5_exti_write) > to be consistent with the irq_pulse in stm32l4x5_exti_set_irq (and also > both these interrupts > are edge-triggered) > - changed the license to GPL > > Changes from v2 to v3: > - adding more tests writing/reading in exti registers > - adding tests checking that interrupt work by reading NVIC registers > - correcting exti_write in SWIER (so it sets an irq only when a bit goes > from '0' to '1') > - correcting exti_set_irq (so it never writes in PR when the relevant > bit in IMR is '0') > > Changes from v1 to v2: > - use arrays to deduplicate code and logic > - move internal constant EXTI_NUM_GPIO_EVENT_IN_LINES from the header > to the .c file > - Improve copyright headers > - replace static const with #define > - use the DEFINE_TYPES macro > - fill the impl and valid field of the exti's MemoryRegionOps > - fix invalid test caused by a last minute change FYI I have your series tagged for review, but I have been busy and won't have time to look at it the next 2 weeks :/ > Based-on: <170100975340.4879.5844108484092111139-0@git.sr.ht> > ([PATCH qemu 0/2] hw/arm: Add minimal support for the B-L475E-IOT01A > board) > > Inès Varhol (3): > hw/arm: Implement STM32L4x5 EXTI > hw/arm: Add STM32L4x5 EXTI QTest testcase > hw/arm: Connect STM32L4x5 EXTI to STM32L4x5 SoC