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[176.184.10.225]) by smtp.gmail.com with ESMTPSA id f6-20020adff586000000b0030796e103a1sm7815194wro.5.2023.06.19.03.37.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Jun 2023 03:37:28 -0700 (PDT) Message-ID: Date: Mon, 19 Jun 2023 12:37:26 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH v2 02/38] util: Add cpuinfo-ppc.c Content-Language: en-US To: Richard Henderson , qemu-devel@nongnu.org Cc: ardb@kernel.org, berrange@redhat.com, qemu-ppc@nongnu.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, pbonzini@redhat.com References: <20230609022401.684157-1-richard.henderson@linaro.org> <20230609022401.684157-3-richard.henderson@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20230609022401.684157-3-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.09, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 9/6/23 04:23, Richard Henderson wrote: > Move the code from tcg/. Fix a bug in that PPC_FEATURE2_ARCH_3_10 > is actually spelled PPC_FEATURE2_ARCH_3_1. This is rather confusing. > Signed-off-by: Richard Henderson > --- > host/include/ppc/host/cpuinfo.h | 29 ++++++++++++++++ > host/include/ppc64/host/cpuinfo.h | 1 + > tcg/ppc/tcg-target.h | 16 ++++----- > util/cpuinfo-ppc.c | 57 +++++++++++++++++++++++++++++++ > tcg/ppc/tcg-target.c.inc | 44 +----------------------- > util/meson.build | 2 ++ > 6 files changed, 98 insertions(+), 51 deletions(-) > create mode 100644 host/include/ppc/host/cpuinfo.h > create mode 100644 host/include/ppc64/host/cpuinfo.h > create mode 100644 util/cpuinfo-ppc.c > > diff --git a/host/include/ppc/host/cpuinfo.h b/host/include/ppc/host/cpuinfo.h > new file mode 100644 > index 0000000000..7ec252ef52 > --- /dev/null > +++ b/host/include/ppc/host/cpuinfo.h > @@ -0,0 +1,29 @@ > +/* > + * SPDX-License-Identifier: GPL-2.0-or-later > + * Host specific cpu indentification for ppc. > + */ > + > +#ifndef HOST_CPUINFO_H > +#define HOST_CPUINFO_H > + > +/* Digested version of */ > + > +#define CPUINFO_ALWAYS (1u << 0) /* so cpuinfo is nonzero */ > +#define CPUINFO_V2_06 (1u << 1) > +#define CPUINFO_V2_07 (1u << 2) > +#define CPUINFO_V3_00 (1u << 3) > +#define CPUINFO_V3_10 (1u << 4) Could we define as CPUINFO_V3_1 ... > +#define CPUINFO_ISEL (1u << 5) > +#define CPUINFO_ALTIVEC (1u << 6) > +#define CPUINFO_VSX (1u << 7) > -#define have_isa_2_06 (have_isa >= tcg_isa_2_06) > -#define have_isa_2_07 (have_isa >= tcg_isa_2_07) > -#define have_isa_3_00 (have_isa >= tcg_isa_3_00) > -#define have_isa_3_10 (have_isa >= tcg_isa_3_10) > +#define have_isa_2_06 (cpuinfo & CPUINFO_V2_06) > +#define have_isa_2_07 (cpuinfo & CPUINFO_V2_07) > +#define have_isa_3_00 (cpuinfo & CPUINFO_V3_00) > +#define have_isa_3_10 (cpuinfo & CPUINFO_V3_10) ... and have_isa_3_1 instead? Otherwise, Reviewed-by: Philippe Mathieu-Daudé