* [PULL 1/5] linux-user: Handle short reads in mmap_h_gt_g
2024-08-21 2:25 [PULL 0/5] misc patch queue Richard Henderson
@ 2024-08-21 2:25 ` Richard Henderson
2024-08-21 2:25 ` [PULL 2/5] bsd-user: " Richard Henderson
` (4 subsequent siblings)
5 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2024-08-21 2:25 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-stable, Philippe Mathieu-Daudé
In particular, if an image has a large bss, we can hit
EOF before reading all host_len bytes of the mapping.
Create a helper, mmap_pread to handle the job for both
the larger block in mmap_h_gt_g itself, as well as the
smaller block in mmap_frag.
Cc: qemu-stable@nongnu.org
Fixes: eb5027ac618 ("linux-user: Split out mmap_h_gt_g")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2504
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240820050848.165253-2-richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
linux-user/mmap.c | 44 ++++++++++++++++++++++++++++++++++++++------
1 file changed, 38 insertions(+), 6 deletions(-)
diff --git a/linux-user/mmap.c b/linux-user/mmap.c
index 6418e811f6..e4bf5d5f39 100644
--- a/linux-user/mmap.c
+++ b/linux-user/mmap.c
@@ -283,6 +283,40 @@ static int do_munmap(void *addr, size_t len)
return munmap(addr, len);
}
+/*
+ * Perform a pread on behalf of target_mmap. We can reach EOF, we can be
+ * interrupted by signals, and in general there's no good error return path.
+ * If @zero, zero the rest of the block at EOF.
+ * Return true on success.
+ */
+static bool mmap_pread(int fd, void *p, size_t len, off_t offset, bool zero)
+{
+ while (1) {
+ ssize_t r = pread(fd, p, len, offset);
+
+ if (likely(r == len)) {
+ /* Complete */
+ return true;
+ }
+ if (r == 0) {
+ /* EOF */
+ if (zero) {
+ memset(p, 0, len);
+ }
+ return true;
+ }
+ if (r > 0) {
+ /* Short read */
+ p += r;
+ len -= r;
+ offset += r;
+ } else if (errno != EINTR) {
+ /* Error */
+ return false;
+ }
+ }
+}
+
/*
* Map an incomplete host page.
*
@@ -357,10 +391,9 @@ static bool mmap_frag(abi_ulong real_start, abi_ulong start, abi_ulong last,
/* Read or zero the new guest pages. */
if (flags & MAP_ANONYMOUS) {
memset(g2h_untagged(start), 0, last - start + 1);
- } else {
- if (pread(fd, g2h_untagged(start), last - start + 1, offset) == -1) {
- return false;
- }
+ } else if (!mmap_pread(fd, g2h_untagged(start), last - start + 1,
+ offset, true)) {
+ return false;
}
/* Put final protection */
@@ -853,8 +886,7 @@ static abi_long mmap_h_gt_g(abi_ulong start, abi_ulong len,
}
if (misaligned_offset) {
- /* TODO: The read could be short. */
- if (pread(fd, p, host_len, offset + real_start - start) != host_len) {
+ if (!mmap_pread(fd, p, host_len, offset + real_start - start, false)) {
do_munmap(p, host_len);
return -1;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PULL 2/5] bsd-user: Handle short reads in mmap_h_gt_g
2024-08-21 2:25 [PULL 0/5] misc patch queue Richard Henderson
2024-08-21 2:25 ` [PULL 1/5] linux-user: Handle short reads in mmap_h_gt_g Richard Henderson
@ 2024-08-21 2:25 ` Richard Henderson
2024-08-21 2:25 ` [PULL 3/5] target/i386: Split out gen_prepare_val_nz Richard Henderson
` (3 subsequent siblings)
5 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2024-08-21 2:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
In particular, if an image has a large bss, we can hit EOF before reading
all bytes of the mapping. Mirror the similar change to linux-user.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240820050848.165253-3-richard.henderson@linaro.org>
---
bsd-user/mmap.c | 38 ++++++++++++++++++++++++++++++++++++--
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/bsd-user/mmap.c b/bsd-user/mmap.c
index f3a4f1712d..775e905960 100644
--- a/bsd-user/mmap.c
+++ b/bsd-user/mmap.c
@@ -128,6 +128,40 @@ error:
return ret;
}
+/*
+ * Perform a pread on behalf of target_mmap. We can reach EOF, we can be
+ * interrupted by signals, and in general there's no good error return path.
+ * If @zero, zero the rest of the block at EOF.
+ * Return true on success.
+ */
+static bool mmap_pread(int fd, void *p, size_t len, off_t offset, bool zero)
+{
+ while (1) {
+ ssize_t r = pread(fd, p, len, offset);
+
+ if (likely(r == len)) {
+ /* Complete */
+ return true;
+ }
+ if (r == 0) {
+ /* EOF */
+ if (zero) {
+ memset(p, 0, len);
+ }
+ return true;
+ }
+ if (r > 0) {
+ /* Short read */
+ p += r;
+ len -= r;
+ offset += r;
+ } else if (errno != EINTR) {
+ /* Error */
+ return false;
+ }
+ }
+}
+
/*
* map an incomplete host page
*
@@ -190,7 +224,7 @@ static int mmap_frag(abi_ulong real_start,
mprotect(host_start, qemu_host_page_size, prot1 | PROT_WRITE);
/* read the corresponding file data */
- if (pread(fd, g2h_untagged(start), end - start, offset) == -1) {
+ if (!mmap_pread(fd, g2h_untagged(start), end - start, offset, true)) {
return -1;
}
@@ -565,7 +599,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot,
-1, 0);
if (retaddr == -1)
goto fail;
- if (pread(fd, g2h_untagged(start), len, offset) == -1) {
+ if (!mmap_pread(fd, g2h_untagged(start), len, offset, false)) {
goto fail;
}
if (!(prot & PROT_WRITE)) {
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PULL 3/5] target/i386: Split out gen_prepare_val_nz
2024-08-21 2:25 [PULL 0/5] misc patch queue Richard Henderson
2024-08-21 2:25 ` [PULL 1/5] linux-user: Handle short reads in mmap_h_gt_g Richard Henderson
2024-08-21 2:25 ` [PULL 2/5] bsd-user: " Richard Henderson
@ 2024-08-21 2:25 ` Richard Henderson
2024-08-21 2:25 ` [PULL 4/5] target/i386: Fix carry flag for BLSI Richard Henderson
` (2 subsequent siblings)
5 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2024-08-21 2:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
Split out the TCG_COND_TSTEQ logic from gen_prepare_eflags_z,
and use it for CC_OP_BMILG* as well. Prepare for requiring
both zero and non-zero senses.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240801075845.573075-2-richard.henderson@linaro.org>
---
target/i386/tcg/translate.c | 22 ++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index b72864bf01..4af282e626 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -865,6 +865,18 @@ static CCPrepare gen_prepare_sign_nz(TCGv src, MemOp size)
}
}
+static CCPrepare gen_prepare_val_nz(TCGv src, MemOp size, bool eqz)
+{
+ if (size == MO_TL) {
+ return (CCPrepare) { .cond = eqz ? TCG_COND_EQ : TCG_COND_NE,
+ .reg = src };
+ } else {
+ return (CCPrepare) { .cond = eqz ? TCG_COND_TSTEQ : TCG_COND_TSTNE,
+ .imm = MAKE_64BIT_MASK(0, 8 << size),
+ .reg = src };
+ }
+}
+
/* compute eflags.C, trying to store it in reg if not NULL */
static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg)
{
@@ -908,8 +920,7 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg)
case CC_OP_BMILGB ... CC_OP_BMILGQ:
size = s->cc_op - CC_OP_BMILGB;
- gen_ext_tl(cpu_cc_src, cpu_cc_src, size, false);
- return (CCPrepare) { .cond = TCG_COND_EQ, .reg = cpu_cc_src };
+ return gen_prepare_val_nz(cpu_cc_src, size, true);
case CC_OP_ADCX:
case CC_OP_ADCOX:
@@ -1006,12 +1017,7 @@ static CCPrepare gen_prepare_eflags_z(DisasContext *s, TCGv reg)
default:
{
MemOp size = (s->cc_op - CC_OP_ADDB) & 3;
- if (size == MO_TL) {
- return (CCPrepare) { .cond = TCG_COND_EQ, .reg = cpu_cc_dst };
- } else {
- return (CCPrepare) { .cond = TCG_COND_TSTEQ, .reg = cpu_cc_dst,
- .imm = (1ull << (8 << size)) - 1 };
- }
+ return gen_prepare_val_nz(cpu_cc_dst, size, true);
}
}
}
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PULL 4/5] target/i386: Fix carry flag for BLSI
2024-08-21 2:25 [PULL 0/5] misc patch queue Richard Henderson
` (2 preceding siblings ...)
2024-08-21 2:25 ` [PULL 3/5] target/i386: Split out gen_prepare_val_nz Richard Henderson
@ 2024-08-21 2:25 ` Richard Henderson
2024-08-21 2:25 ` [PULL 5/5] target/i386: Fix tss access size in switch_tss_ra Richard Henderson
2024-08-21 5:08 ` [PULL 0/5] misc patch queue Richard Henderson
5 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2024-08-21 2:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
BLSI has inverted semantics for C as compared to the other two
BMI1 instructions, BLSMSK and BLSR. Introduce CC_OP_BLSI* for
this purpose.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2175
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240801075845.573075-3-richard.henderson@linaro.org>
---
target/i386/cpu.h | 5 +++++
target/i386/tcg/cc_helper.c | 18 ++++++++++++++++++
target/i386/tcg/translate.c | 5 +++++
tests/tcg/x86_64/test-2175.c | 24 ++++++++++++++++++++++++
target/i386/tcg/cc_helper_template.h.inc | 18 ++++++++++++++++++
target/i386/tcg/emit.c.inc | 2 +-
tests/tcg/x86_64/Makefile.target | 1 +
7 files changed, 72 insertions(+), 1 deletion(-)
create mode 100644 tests/tcg/x86_64/test-2175.c
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index c6cc035df3..14edd57a37 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1339,6 +1339,11 @@ typedef enum {
CC_OP_BMILGL,
CC_OP_BMILGQ,
+ CC_OP_BLSIB, /* Z,S via CC_DST, C = SRC!=0; O=0; P,A undefined */
+ CC_OP_BLSIW,
+ CC_OP_BLSIL,
+ CC_OP_BLSIQ,
+
/*
* Note that only CC_OP_POPCNT (i.e. the one with MO_TL size)
* is used or implemented, because the translation needs
diff --git a/target/i386/tcg/cc_helper.c b/target/i386/tcg/cc_helper.c
index 301ed95406..dbddaa2fcb 100644
--- a/target/i386/tcg/cc_helper.c
+++ b/target/i386/tcg/cc_helper.c
@@ -186,6 +186,13 @@ target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1,
case CC_OP_BMILGL:
return compute_all_bmilgl(dst, src1);
+ case CC_OP_BLSIB:
+ return compute_all_blsib(dst, src1);
+ case CC_OP_BLSIW:
+ return compute_all_blsiw(dst, src1);
+ case CC_OP_BLSIL:
+ return compute_all_blsil(dst, src1);
+
case CC_OP_ADCX:
return compute_all_adcx(dst, src1, src2);
case CC_OP_ADOX:
@@ -216,6 +223,8 @@ target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1,
return compute_all_sarq(dst, src1);
case CC_OP_BMILGQ:
return compute_all_bmilgq(dst, src1);
+ case CC_OP_BLSIQ:
+ return compute_all_blsiq(dst, src1);
#endif
}
}
@@ -308,6 +317,13 @@ target_ulong helper_cc_compute_c(target_ulong dst, target_ulong src1,
case CC_OP_BMILGL:
return compute_c_bmilgl(dst, src1);
+ case CC_OP_BLSIB:
+ return compute_c_blsib(dst, src1);
+ case CC_OP_BLSIW:
+ return compute_c_blsiw(dst, src1);
+ case CC_OP_BLSIL:
+ return compute_c_blsil(dst, src1);
+
#ifdef TARGET_X86_64
case CC_OP_ADDQ:
return compute_c_addq(dst, src1);
@@ -321,6 +337,8 @@ target_ulong helper_cc_compute_c(target_ulong dst, target_ulong src1,
return compute_c_shlq(dst, src1);
case CC_OP_BMILGQ:
return compute_c_bmilgq(dst, src1);
+ case CC_OP_BLSIQ:
+ return compute_c_blsiq(dst, src1);
#endif
}
}
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 4af282e626..98f5fe61ed 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -304,6 +304,7 @@ static const uint8_t cc_op_live[CC_OP_NB] = {
[CC_OP_SHLB ... CC_OP_SHLQ] = USES_CC_DST | USES_CC_SRC,
[CC_OP_SARB ... CC_OP_SARQ] = USES_CC_DST | USES_CC_SRC,
[CC_OP_BMILGB ... CC_OP_BMILGQ] = USES_CC_DST | USES_CC_SRC,
+ [CC_OP_BLSIB ... CC_OP_BLSIQ] = USES_CC_DST | USES_CC_SRC,
[CC_OP_ADCX] = USES_CC_DST | USES_CC_SRC,
[CC_OP_ADOX] = USES_CC_SRC | USES_CC_SRC2,
[CC_OP_ADCOX] = USES_CC_DST | USES_CC_SRC | USES_CC_SRC2,
@@ -922,6 +923,10 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg)
size = s->cc_op - CC_OP_BMILGB;
return gen_prepare_val_nz(cpu_cc_src, size, true);
+ case CC_OP_BLSIB ... CC_OP_BLSIQ:
+ size = s->cc_op - CC_OP_BLSIB;
+ return gen_prepare_val_nz(cpu_cc_src, size, false);
+
case CC_OP_ADCX:
case CC_OP_ADCOX:
return (CCPrepare) { .cond = TCG_COND_NE, .reg = cpu_cc_dst,
diff --git a/tests/tcg/x86_64/test-2175.c b/tests/tcg/x86_64/test-2175.c
new file mode 100644
index 0000000000..aafd037bce
--- /dev/null
+++ b/tests/tcg/x86_64/test-2175.c
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* See https://gitlab.com/qemu-project/qemu/-/issues/2185 */
+
+#include <assert.h>
+
+int test_setc(unsigned int x, unsigned int y)
+{
+ asm("blsi %1, %0; setc %b0" : "+r"(x) : "r"(y));
+ return (unsigned char)x;
+}
+
+int test_pushf(unsigned int x, unsigned int y)
+{
+ asm("blsi %1, %0; pushf; pop %q0" : "+r"(x) : "r"(y));
+ return x & 1;
+}
+
+int main()
+{
+ assert(test_setc(1, 0xedbf530a));
+ assert(test_pushf(1, 0xedbf530a));
+ return 0;
+}
+
diff --git a/target/i386/tcg/cc_helper_template.h.inc b/target/i386/tcg/cc_helper_template.h.inc
index bb611feb04..c5425e57cf 100644
--- a/target/i386/tcg/cc_helper_template.h.inc
+++ b/target/i386/tcg/cc_helper_template.h.inc
@@ -235,6 +235,24 @@ static int glue(compute_c_bmilg, SUFFIX)(DATA_TYPE dst, DATA_TYPE src1)
return src1 == 0;
}
+static int glue(compute_all_blsi, SUFFIX)(DATA_TYPE dst, DATA_TYPE src1)
+{
+ int cf, pf, af, zf, sf, of;
+
+ cf = (src1 != 0);
+ pf = 0; /* undefined */
+ af = 0; /* undefined */
+ zf = (dst == 0) * CC_Z;
+ sf = lshift(dst, 8 - DATA_BITS) & CC_S;
+ of = 0;
+ return cf | pf | af | zf | sf | of;
+}
+
+static int glue(compute_c_blsi, SUFFIX)(DATA_TYPE dst, DATA_TYPE src1)
+{
+ return src1 != 0;
+}
+
#undef DATA_BITS
#undef SIGN_MASK
#undef DATA_TYPE
diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index 22a06897fb..9b50419918 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -1304,7 +1304,7 @@ static void gen_BLSI(DisasContext *s, X86DecodedInsn *decode)
/* input in T1, which is ready for prepare_update2_cc */
tcg_gen_neg_tl(s->T0, s->T1);
tcg_gen_and_tl(s->T0, s->T0, s->T1);
- prepare_update2_cc(decode, s, CC_OP_BMILGB + ot);
+ prepare_update2_cc(decode, s, CC_OP_BLSIB + ot);
}
static void gen_BLSMSK(DisasContext *s, X86DecodedInsn *decode)
diff --git a/tests/tcg/x86_64/Makefile.target b/tests/tcg/x86_64/Makefile.target
index eda9bd7396..783ab5b21a 100644
--- a/tests/tcg/x86_64/Makefile.target
+++ b/tests/tcg/x86_64/Makefile.target
@@ -16,6 +16,7 @@ X86_64_TESTS += noexec
X86_64_TESTS += cmpxchg
X86_64_TESTS += adox
X86_64_TESTS += test-1648
+X86_64_TESTS += test-2175
TESTS=$(MULTIARCH_TESTS) $(X86_64_TESTS) test-x86_64
else
TESTS=$(MULTIARCH_TESTS)
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PULL 5/5] target/i386: Fix tss access size in switch_tss_ra
2024-08-21 2:25 [PULL 0/5] misc patch queue Richard Henderson
` (3 preceding siblings ...)
2024-08-21 2:25 ` [PULL 4/5] target/i386: Fix carry flag for BLSI Richard Henderson
@ 2024-08-21 2:25 ` Richard Henderson
2024-08-21 5:08 ` [PULL 0/5] misc patch queue Richard Henderson
5 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2024-08-21 2:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Pierrick Bouvier
The two limit_max variables represent size - 1, just like the
encoding in the GDT, thus the 'old' access was off by one.
Access the minimal size of the new tss: the complete tss contains
the iopb, which may be a larger block than the access api expects,
and irrelevant because the iopb is not accessed during the
switch itself.
Fixes: 8b131065080a ("target/i386/tcg: use X86Access for TSS access")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2511
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240819074052.207783-1-richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
target/i386/tcg/seg_helper.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index bab552cd53..3b8fd827e1 100644
--- a/target/i386/tcg/seg_helper.c
+++ b/target/i386/tcg/seg_helper.c
@@ -378,7 +378,7 @@ static int switch_tss_ra(CPUX86State *env, int tss_selector,
/* X86Access avoids memory exceptions during the task switch */
mmu_index = cpu_mmu_index_kernel(env);
- access_prepare_mmu(&old, env, env->tr.base, old_tss_limit_max,
+ access_prepare_mmu(&old, env, env->tr.base, old_tss_limit_max + 1,
MMU_DATA_STORE, mmu_index, retaddr);
if (source == SWITCH_TSS_CALL) {
@@ -386,7 +386,8 @@ static int switch_tss_ra(CPUX86State *env, int tss_selector,
probe_access(env, tss_base, 2, MMU_DATA_STORE,
mmu_index, retaddr);
}
- access_prepare_mmu(&new, env, tss_base, tss_limit,
+ /* While true tss_limit may be larger, we don't access the iopb here. */
+ access_prepare_mmu(&new, env, tss_base, tss_limit_max + 1,
MMU_DATA_LOAD, mmu_index, retaddr);
/* save the current state in the old TSS */
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PULL 0/5] misc patch queue
2024-08-21 2:25 [PULL 0/5] misc patch queue Richard Henderson
` (4 preceding siblings ...)
2024-08-21 2:25 ` [PULL 5/5] target/i386: Fix tss access size in switch_tss_ra Richard Henderson
@ 2024-08-21 5:08 ` Richard Henderson
5 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2024-08-21 5:08 UTC (permalink / raw)
To: qemu-devel
On 8/21/24 12:25, Richard Henderson wrote:
> The following changes since commit 9eb5bfbe3394b92fb37cc6f155ceea4d6c9e401c:
>
> Merge tag 'for_upstream' ofhttps://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging (2024-08-20 21:29:52 +1000)
>
> are available in the Git repository at:
>
> https://gitlab.com/rth7680/qemu.git tags/pull-misc-20240821
>
> for you to fetch changes up to ded1db48c9f9b35f6d9569e53503e2b345f6d44e:
>
> target/i386: Fix tss access size in switch_tss_ra (2024-08-21 09:11:26 +1000)
>
> ----------------------------------------------------------------
> target/i386: Fix carry flag for BLSI
> target/i386: Fix tss access size in switch_tss_ra
> linux-user: Handle short reads in mmap_h_gt_g
> bsd-user: Handle short reads in mmap_h_gt_g
Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/9.1 as appropriate.
r~
^ permalink raw reply [flat|nested] 11+ messages in thread