From: Richard Henderson <richard.henderson@linaro.org>
To: David Hildenbrand <david@redhat.com>, qemu-devel@nongnu.org
Cc: qemu-s390x@nongnu.org, Cornelia Huck <cohuck@redhat.com>,
Thomas Huth <thuth@redhat.com>
Subject: Re: [PATCH v1 04/20] s390x/tcg: Implement 32/128 bit for VECTOR FP ADD
Date: Thu, 1 Oct 2020 10:45:06 -0500 [thread overview]
Message-ID: <eda4575a-574b-1aa9-c51b-cb205786130c@linaro.org> (raw)
In-Reply-To: <20200930145523.71087-5-david@redhat.com>
On 9/30/20 9:55 AM, David Hildenbrand wrote:
> -typedef uint64_t (*vop64_3_fn)(uint64_t a, uint64_t b, float_status *s);
> -static void vop64_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
> - CPUS390XState *env, bool s, vop64_3_fn fn,
> - uintptr_t retaddr)
> -{
> - uint8_t vxc, vec_exc = 0;
> - S390Vector tmp = {};
> - int i;
> -
> - for (i = 0; i < 2; i++) {
> - const uint64_t a = s390_vec_read_element64(v2, i);
> - const uint64_t b = s390_vec_read_element64(v3, i);
> -
> - s390_vec_write_element64(&tmp, i, fn(a, b, &env->fpu_status));
> - vxc = check_ieee_exc(env, i, false, &vec_exc);
> - if (s || vxc) {
> - break;
> - }
> - }
> - handle_ieee_exc(env, vxc, vec_exc, retaddr);
> - *v1 = tmp;
> -}
...
> +#define DEF_VOP_3(BITS) \
> +typedef float##BITS (*vop##BITS##_3_fn)(float##BITS a, float##BITS b, \
> + float_status *s); \
> +static void vop##BITS##_3(S390Vector *v1, const S390Vector *v2, \
> + const S390Vector *v3, CPUS390XState *env, bool s, \
> + vop##BITS##_3_fn fn, uintptr_t retaddr) \
> +{ \
> + uint8_t vxc, vec_exc = 0; \
> + S390Vector tmp = {}; \
> + int i; \
> + \
> + for (i = 0; i < (128 / BITS); i++) { \
> + const float##BITS a = s390_vec_read_float##BITS(v2, i); \
> + const float##BITS b = s390_vec_read_float##BITS(v3, i); \
> + \
> + s390_vec_write_float##BITS(&tmp, i, fn(a, b, &env->fpu_status)); \
> + vxc = check_ieee_exc(env, i, false, &vec_exc); \
> + if (s || vxc) { \
> + break; \
> + } \
> + } \
> + handle_ieee_exc(env, vxc, vec_exc, retaddr); \
> + *v1 = tmp; \
> +}
> +DEF_VOP_3(32)
> +DEF_VOP_3(64)
> +DEF_VOP_3(128)
While this works, you won't be able to step through this function in the
debugger anymore, because it now has one source line: at the point of expansion.
We do have plenty of these around the code base, I know. This is small enough
that I think it's reasonable to simply have three copies, one for each type.
> +#define DEF_GVEC_FVA(BITS) \
> +void HELPER(gvec_vfa##BITS)(void *v1, const void *v2, const void *v3, \
> + CPUS390XState *env, uint32_t desc) \
> +{ \
> + vop##BITS##_3(v1, v2, v3, env, false, float##BITS##_add, GETPC()); \
> +}
> +DEF_GVEC_FVA(32)
> +DEF_GVEC_FVA(64)
> +DEF_GVEC_FVA(128)
> +
> +#define DEF_GVEC_FVA_S(BITS) \
> +void HELPER(gvec_vfa##BITS##s)(void *v1, const void *v2, const void *v3, \
> + CPUS390XState *env, uint32_t desc) \
> +{ \
> + vop##BITS##_3(v1, v2, v3, env, true, float##BITS##_add, GETPC()); \
> +}
> +DEF_GVEC_FVA_S(32)
> +DEF_GVEC_FVA_S(64)
I think you're defining these macros with the wrong parameters. Think of how
to use the same macros for all of add/sub/etc.
E.g.
#define DEF_FOP3_B(NAME, OP, BITS) \...
void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2,
const void *v3, CPUS390XState *env, uint32_t desc)
{
vop##BITS##_3(v1, v2, v3, env, false,
float##BITS##_##OP, GETPC());
}
void HELPER(gvec_##NAME##BITS##s)(void *v1, const void *v2,
const void *v3, CPUS390XState *env, uint32_t desc)
{
vop##BITS##_3(v1, v2, v3, env, true,
float##BITS##_##OP, GETPC());
}
#define DEF_FOP3(NAME, OP) \
DEF_FOP3_B(NAME, OP, 32) \
DEF_FOP3_B(NAME, OP, 64) \
DEF_FOP3_B(NAME, OP, 128)
DEF_FOP3(vfa, add)
DEF_FOP3(vfd, div)
DEF_FOP3(vfm, mul)
etc.
r~
next prev parent reply other threads:[~2020-10-01 15:58 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 14:55 [PATCH v1 00/20] s390x/tcg: Implement Vector enhancements facility and switch to z14 David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 01/20] softfloat: Implement float128_(min|minnum|minnummag|max|maxnum|maxnummag) David Hildenbrand
2020-09-30 16:10 ` Alex Bennée
2020-10-01 12:40 ` David Hildenbrand
2020-10-01 13:15 ` Alex Bennée
2021-05-05 14:54 ` David Hildenbrand
2021-05-10 9:57 ` Alex Bennée
2021-05-10 10:00 ` David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 02/20] s390x/tcg: Implement VECTOR BIT PERMUTE David Hildenbrand
2020-10-01 15:17 ` Richard Henderson
2020-10-01 17:28 ` David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 03/20] s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICAL David Hildenbrand
2020-10-01 15:26 ` Richard Henderson
2020-10-01 17:30 ` David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 04/20] s390x/tcg: Implement 32/128 bit for VECTOR FP ADD David Hildenbrand
2020-10-01 15:45 ` Richard Henderson [this message]
2020-10-01 16:08 ` Richard Henderson
2020-10-01 17:08 ` David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 05/20] s390x/tcg: Implement 32/128 bit for VECTOR FP DIVIDE David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 06/20] s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 07/20] s390x/tcg: Implement 32/128 bit for VECTOR FP SUBTRACT David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 08/20] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALAR David Hildenbrand
2020-10-01 15:52 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 09/20] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE * David Hildenbrand
2020-10-01 16:12 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 10/20] s390x/tcg: Implement 32/128 bit for VECTOR LOAD FP INTEGER David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 11/20] s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED David Hildenbrand
2020-10-01 16:19 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 12/20] s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDED David Hildenbrand
2020-10-01 16:21 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 13/20] s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION David Hildenbrand
2020-10-01 16:24 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 14/20] s390x/tcg: Implement 32/128 bit for VECTOR FP SQUARE ROOT David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 15/20] s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE David Hildenbrand
2020-10-01 16:30 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 16/20] s390x/tcg: Implement 32/128bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT) David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 17/20] s390x/tcg: Implement VECTOR FP NEGATIVE " David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 18/20] s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM) David Hildenbrand
2020-10-01 16:49 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 19/20] s390x/tcg: We support Vector enhancements facility David Hildenbrand
2020-10-01 16:50 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 20/20] s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2 David Hildenbrand
2020-10-01 16:52 ` Richard Henderson
2020-09-30 15:35 ` [PATCH v1 00/20] s390x/tcg: Implement Vector enhancements facility and switch to z14 no-reply
2020-10-01 15:07 ` Richard Henderson
2020-10-07 13:09 ` David Hildenbrand
2021-05-05 10:55 ` David Hildenbrand
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