Re: [PATCH v6 3/7] qemu: add support for iOS host

["Philippe Mathieu-Daudé" <philmd@linaro.org>]

(Cc'ing Ariadne, libucontext maintainer)

On 21/1/21 19:53, Peter Maydell wrote:
> On Tue, 5 Jan 2021 at 02:25, Joelle van Dyne <j@getutm.app> wrote:
>>
>> This introduces support for building for iOS hosts. When the correct Xcode
>> toolchain is used, iOS host will be detected automatically.
>>
>> * block: disable features not supported by iOS sandbox
>> * slirp: disable SMB features for iOS
>> * osdep: disable system() calls for iOS
> 
>> +``ucontext`` support is broken on iOS. The implementation from ``libucontext``
>> +is used instead.
> 
> Just a note since it came up in another thread today, but
> looking at libucontext its aarch64 backend doesn't handle
> the floating point registers. I think if the *context
> routines don't save/restore the callee-saves fp regs
> (v8-v15, FPCR) then it's liable to result in tricky-to-track
> down bugs where some kept-in-a-callee-saves-fp-register data
> from a function further up the callstack gets corrupted, depending
> on what the compiler happens to do. It would be good to work with
> the libucontext maintainers to add that functionality.

Per https://github.com/kaniini/libucontext/blob/master/README.md#caveats
this is a design choice:

   Only basic GPR registers are saved and restored when context swapping.
   The glibc implementation uses hardware capability detection to
   save/restore other register groups, such as the FPU registers or
   vector processing (AltiVec/AVX/NEON) registers. Adding this capability
   detection would significantly increase the complexity of the project
   and thus is not implemented. Support for compiling in code to
   save/restore FPU registers or vector registers may be added in a later
   release as a build-time setting -- for now, we assume a soft-float ABI
   with no optional processor features.

Minor update in 2022:
https://github.com/kaniini/libucontext/commit/5244775fb93ab9

   This is a work in progress, as newer compilers will spill even
   non-floating-point state through floating point registers when allowed
   to do so.

Regards,

Phil.