Re: [PATCH 3/3] hw/intc/arm_gicv3: Support multiple redistributor regions

[Richard Henderson <richard.henderson@linaro.org>]

On 9/30/21 11:08 AM, Peter Maydell wrote:
> Our GICv3 QOM interface includes an array property
> redist-region-count which allows board models to specify that the
> registributor registers are not in a single contiguous range, but
> split into multiple pieces.  We implemented this for KVM, but
> currently the TCG GICv3 model insists that there is only one region.
> You can see the limit being hit with a setup like:
>    qemu-system-aarch64 -machine virt,gic-version=3 -smp 124
> 
> Add support for split regions to the TCG GICv3.  To do this we switch
> from allocating a simple array of MemoryRegions to an array of
> GICv3RedistRegion structs so that we can use the GICv3RedistRegion as
> the opaque pointer in the MemoryRegion read/write callbacks.  Each
> GICv3RedistRegion contains the MemoryRegion, a backpointer allowing
> the read/write callback to get hold of the GICv3State, and an index
> which allows us to calculate which CPU's redistributor is being
> accessed.
> 
> Note that arm_gicv3_kvm always passes in NULL as the ops argument
> to gicv3_init_irqs_and_mmio(), so the only MemoryRegion read/write
> callbacks we need to update to handle this new scheme are the
> gicv3_redist_read/write functions used by the emulated GICv3.
> 
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~