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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, atar4qemu@gmail.com
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 07/11] sun4u: rename apb variables and constants
Date: Sun, 14 Jan 2018 10:20:09 -0300	[thread overview]
Message-ID: <ee46e8fc-0ff2-3624-1b51-7377f05143d3@amsat.org> (raw)
In-Reply-To: <20180114104751.21965-8-mark.cave-ayland@ilande.co.uk>

Hi Mark,

On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote:
> In order to reflect the previous change of TYPE_APB to TYPE_SABRE, update
> the corresponding variable names to keep the terminology consistent.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
>  hw/sparc64/sun4u.c | 41 +++++++++++++++++++++--------------------
>  1 file changed, 21 insertions(+), 20 deletions(-)
> 
> diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
> index b8f685847a..fb18afaaa6 100644
> --- a/hw/sparc64/sun4u.c
> +++ b/hw/sparc64/sun4u.c
> @@ -55,9 +55,9 @@
>  #define CMDLINE_ADDR         0x003ff000
>  #define PROM_SIZE_MAX        (4 * 1024 * 1024)
>  #define PROM_VADDR           0x000ffd00000ULL
> -#define APB_SPECIAL_BASE     0x1fe00000000ULL
> -#define APB_MEM_BASE         0x1ff00000000ULL
> -#define APB_PCI_IO_BASE      (APB_SPECIAL_BASE + 0x02000000ULL)
> +#define PBM_SPECIAL_BASE     0x1fe00000000ULL
> +#define PBM_MEM_BASE         0x1ff00000000ULL
> +#define PBM_PCI_IO_BASE      (PBM_SPECIAL_BASE + 0x02000000ULL)
>  #define PROM_FILENAME        "openbios-sparc64"
>  #define NVRAM_SIZE           0x2000
>  #define MAX_IDE_BUS          2
> @@ -465,7 +465,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
>      Nvram *nvram;
>      unsigned int i;
>      uint64_t initrd_addr, initrd_size, kernel_addr, kernel_size, kernel_entry;
> -    SabreState *apb;
> +    SabreState *sabre;
>      PCIBus *pci_bus, *pci_busA, *pci_busB;
>      PCIDevice *ebus, *pci_dev;
>      SysBusDevice *s;
> @@ -489,23 +489,24 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
>      prom_init(hwdef->prom_addr, bios_name);
>  
>      /* Init sabre (PCI host bridge) */
> -    apb = SABRE_DEVICE(qdev_create(NULL, TYPE_SABRE));
> -    qdev_prop_set_uint64(DEVICE(apb), "special-base", APB_SPECIAL_BASE);
> -    qdev_prop_set_uint64(DEVICE(apb), "mem-base", APB_MEM_BASE);
> -    object_property_set_link(OBJECT(apb), OBJECT(iommu), "iommu", &error_abort);
> -    qdev_init_nofail(DEVICE(apb));
> +    sabre = SABRE_DEVICE(qdev_create(NULL, TYPE_SABRE));
> +    qdev_prop_set_uint64(DEVICE(sabre), "special-base", PBM_SPECIAL_BASE);
> +    qdev_prop_set_uint64(DEVICE(sabre), "mem-base", PBM_MEM_BASE);
> +    object_property_set_link(OBJECT(sabre), OBJECT(iommu), "iommu",
> +                             &error_abort);
> +    qdev_init_nofail(DEVICE(sabre));
>  
>      /* Wire up PCI interrupts to CPU */
>      for (i = 0; i < IVEC_MAX; i++) {
> -        qdev_connect_gpio_out_named(DEVICE(apb), "ivec-irq", i,
> +        qdev_connect_gpio_out_named(DEVICE(sabre), "ivec-irq", i,
>              qdev_get_gpio_in_named(DEVICE(cpu), "ivec-irq", i));
>      }
>  
> -    pci_bus = PCI_HOST_BRIDGE(apb)->bus;
> -    pci_busA = pci_bridge_get_sec_bus(apb->bridgeA);
> -    pci_busB = pci_bridge_get_sec_bus(apb->bridgeB);
> +    pci_bus = PCI_HOST_BRIDGE(sabre)->bus;
> +    pci_busA = pci_bridge_get_sec_bus(sabre->bridgeA);
> +    pci_busB = pci_bridge_get_sec_bus(sabre->bridgeB);
>  
> -    /* Only in-built Simba PBMs can exist on the root bus, slot 0 on busA is
> +    /* Only in-built Simba APBs can exist on the root bus, slot 0 on busA is

This single change might go in patch #2 instead.

Anyway:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

>         reserved (leaving no slots free after on-board devices) however slots
>         0-3 are free on busB */
>      pci_bus->slot_reserved_mask = 0xfffffffc;
> @@ -517,17 +518,17 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
>                           hwdef->console_serial_base);
>      qdev_init_nofail(DEVICE(ebus));
>  
> -    /* Wire up "well-known" ISA IRQs to APB legacy obio IRQs */
> +    /* Wire up "well-known" ISA IRQs to PBM legacy obio IRQs */
>      qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", 7,
> -        qdev_get_gpio_in_named(DEVICE(apb), "pbm-irq", OBIO_LPT_IRQ));
> +        qdev_get_gpio_in_named(DEVICE(sabre), "pbm-irq", OBIO_LPT_IRQ));
>      qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", 6,
> -        qdev_get_gpio_in_named(DEVICE(apb), "pbm-irq", OBIO_FDD_IRQ));
> +        qdev_get_gpio_in_named(DEVICE(sabre), "pbm-irq", OBIO_FDD_IRQ));
>      qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", 1,
> -        qdev_get_gpio_in_named(DEVICE(apb), "pbm-irq", OBIO_KBD_IRQ));
> +        qdev_get_gpio_in_named(DEVICE(sabre), "pbm-irq", OBIO_KBD_IRQ));
>      qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", 12,
> -        qdev_get_gpio_in_named(DEVICE(apb), "pbm-irq", OBIO_MSE_IRQ));
> +        qdev_get_gpio_in_named(DEVICE(sabre), "pbm-irq", OBIO_MSE_IRQ));
>      qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", 4,
> -        qdev_get_gpio_in_named(DEVICE(apb), "pbm-irq", OBIO_SER_IRQ));
> +        qdev_get_gpio_in_named(DEVICE(sabre), "pbm-irq", OBIO_SER_IRQ));
>  
>      pci_dev = pci_create_simple(pci_busA, PCI_DEVFN(2, 0), "VGA");
>  
> 

  reply	other threads:[~2018-01-14 13:20 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-14 10:47 [Qemu-devel] [PATCH 00/11] sun4u: APB tidy-up/rename and tracepoint conversions Mark Cave-Ayland
2018-01-14 10:47 ` [Qemu-devel] [PATCH 01/11] apb: split simba PCI bridge into hw/pci-bridge/simba.c Mark Cave-Ayland
2018-01-14 13:05   ` Philippe Mathieu-Daudé
2018-01-14 10:47 ` [Qemu-devel] [PATCH 02/11] simba: rename PBMPCIBridge and QOM types to reflect simba naming Mark Cave-Ayland
2018-01-14 13:05   ` Philippe Mathieu-Daudé
2018-01-14 10:47 ` [Qemu-devel] [PATCH 03/11] apb: rename APB functions to use sabre prefix Mark Cave-Ayland
2018-01-14 13:08   ` Philippe Mathieu-Daudé
2018-01-14 10:47 ` [Qemu-devel] [PATCH 04/11] apb: change pbm_pci_host prefix functions to use sabre_pci prefix Mark Cave-Ayland
2018-01-14 13:09   ` Philippe Mathieu-Daudé
2018-01-14 10:47 ` [Qemu-devel] [PATCH 05/11] apb: QOMify sabre PCI host bridge Mark Cave-Ayland
2018-01-14 13:13   ` Philippe Mathieu-Daudé
2018-01-14 10:47 ` [Qemu-devel] [PATCH 06/11] apb: rename QOM type from TYPE_APB to TYPE_SABRE Mark Cave-Ayland
2018-01-14 13:15   ` Philippe Mathieu-Daudé
2018-01-14 10:47 ` [Qemu-devel] [PATCH 07/11] sun4u: rename apb variables and constants Mark Cave-Ayland
2018-01-14 13:20   ` Philippe Mathieu-Daudé [this message]
2018-01-15 18:26     ` Mark Cave-Ayland
2018-01-14 10:47 ` [Qemu-devel] [PATCH 08/11] apb: rename apb.c to sabre.c Mark Cave-Ayland
2018-01-14 13:30   ` Philippe Mathieu-Daudé
2018-01-14 10:47 ` [Qemu-devel] [PATCH 09/11] pci: add trace-events support for hw/pci-host Mark Cave-Ayland
2018-01-14 13:32   ` Philippe Mathieu-Daudé
2018-01-14 16:27     ` Marcel Apfelbaum
2018-01-15 18:29       ` Mark Cave-Ayland
2018-01-16  4:48   ` Michael S. Tsirkin
2018-01-14 10:47 ` [Qemu-devel] [PATCH 10/11] sabre: convert from SABRE_DPRINTF macro to trace-events Mark Cave-Ayland
2018-01-14 13:36   ` Philippe Mathieu-Daudé
2018-01-14 10:47 ` [Qemu-devel] [PATCH 11/11] sparc64: convert hw/sparc64/sparc64.c from DPRINTF macros to trace events Mark Cave-Ayland
2018-01-14 13:41   ` Philippe Mathieu-Daudé
2018-01-14 11:15 ` [Qemu-devel] [PATCH 00/11] sun4u: APB tidy-up/rename and tracepoint conversions no-reply
2018-01-14 11:21   ` Mark Cave-Ayland
2018-01-14 13:25     ` Philippe Mathieu-Daudé
2018-01-15 18:38       ` Mark Cave-Ayland
2018-01-20 20:24         ` Artyom Tarasenko

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