From: "Cédric Le Goater" <clg@kaod.org>
To: Jamin Lin <jamin_lin@aspeedtech.com>,
Peter Maydell <peter.maydell@linaro.org>,
Steven Lee <steven_lee@aspeedtech.com>,
Troy Lee <leetroy@gmail.com>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
Joel Stanley <joel@jms.id.au>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>
Cc: troy_lee@aspeedtech.com
Subject: Re: [PATCH v4 06/23] hw/arm/aspeed: Rename IRQ table and machine name for AST2700 A0
Date: Mon, 3 Mar 2025 15:23:32 +0100 [thread overview]
Message-ID: <ee616fe5-280d-4afa-84db-9896b39fcb7a@kaod.org> (raw)
In-Reply-To: <20250303095457.2337631-7-jamin_lin@aspeedtech.com>
On 3/3/25 10:54, Jamin Lin wrote:
> Currently, AST2700 SoC only supports A0. To support AST2700 A1, rename its IRQ
> table and machine name.
>
> To follow the machine deprecation rule, the initial machine "ast2700-evb" is
> aliased to "ast2700a0-evb." In the future, we will alias "ast2700-evb" to new
> SoCs, such as "ast2700a1-evb."
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> hw/arm/aspeed.c | 9 +++++----
> hw/arm/aspeed_ast27x0.c | 8 ++++----
> 2 files changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
> index c6c18596d6..2482f05154 100644
> --- a/hw/arm/aspeed.c
> +++ b/hw/arm/aspeed.c
> @@ -1673,12 +1673,13 @@ static void ast2700_evb_i2c_init(AspeedMachineState *bmc)
> TYPE_TMP105, 0x4d);
> }
>
> -static void aspeed_machine_ast2700_evb_class_init(ObjectClass *oc, void *data)
> +static void aspeed_machine_ast2700a0_evb_class_init(ObjectClass *oc, void *data)
> {
> MachineClass *mc = MACHINE_CLASS(oc);
> AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
>
> - mc->desc = "Aspeed AST2700 EVB (Cortex-A35)";
> + mc->desc = "Aspeed AST2700 A0 EVB (Cortex-A35)";
> + mc->alias = "ast2700-evb";
please put the ->alias assignment line first. So that it is
easily identified.
Thanks,
C.
> amc->soc_name = "ast2700-a0";
> amc->hw_strap1 = AST2700_EVB_HW_STRAP1;
> amc->hw_strap2 = AST2700_EVB_HW_STRAP2;
> @@ -1817,9 +1818,9 @@ static const TypeInfo aspeed_machine_types[] = {
> .class_init = aspeed_minibmc_machine_ast1030_evb_class_init,
> #ifdef TARGET_AARCH64
> }, {
> - .name = MACHINE_TYPE_NAME("ast2700-evb"),
> + .name = MACHINE_TYPE_NAME("ast2700a0-evb"),
> .parent = TYPE_ASPEED_MACHINE,
> - .class_init = aspeed_machine_ast2700_evb_class_init,
> + .class_init = aspeed_machine_ast2700a0_evb_class_init,
> #endif
> }, {
> .name = TYPE_ASPEED_MACHINE,
> diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
> index 527a5f8245..f1beea7ece 100644
> --- a/hw/arm/aspeed_ast27x0.c
> +++ b/hw/arm/aspeed_ast27x0.c
> @@ -73,7 +73,7 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = {
> #define AST2700_MAX_IRQ 256
>
> /* Shared Peripheral Interrupt values below are offset by -32 from datasheet */
> -static const int aspeed_soc_ast2700_irqmap[] = {
> +static const int aspeed_soc_ast2700a0_irqmap[] = {
> [ASPEED_DEV_UART0] = 132,
> [ASPEED_DEV_UART1] = 132,
> [ASPEED_DEV_UART2] = 132,
> @@ -762,7 +762,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
> create_unimplemented_device("ast2700.io", 0x0, 0x4000000);
> }
>
> -static void aspeed_soc_ast2700_class_init(ObjectClass *oc, void *data)
> +static void aspeed_soc_ast2700a0_class_init(ObjectClass *oc, void *data)
> {
> static const char * const valid_cpu_types[] = {
> ARM_CPU_TYPE_NAME("cortex-a35"),
> @@ -785,7 +785,7 @@ static void aspeed_soc_ast2700_class_init(ObjectClass *oc, void *data)
> sc->uarts_num = 13;
> sc->num_cpus = 4;
> sc->uarts_base = ASPEED_DEV_UART0;
> - sc->irqmap = aspeed_soc_ast2700_irqmap;
> + sc->irqmap = aspeed_soc_ast2700a0_irqmap;
> sc->memmap = aspeed_soc_ast2700_memmap;
> sc->get_irq = aspeed_soc_ast2700_get_irq;
> }
> @@ -800,7 +800,7 @@ static const TypeInfo aspeed_soc_ast27x0_types[] = {
> .name = "ast2700-a0",
> .parent = TYPE_ASPEED27X0_SOC,
> .instance_init = aspeed_soc_ast2700_init,
> - .class_init = aspeed_soc_ast2700_class_init,
> + .class_init = aspeed_soc_ast2700a0_class_init,
> },
> };
>
next prev parent reply other threads:[~2025-03-03 14:24 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-03 9:54 [PATCH v4 00/23] Support AST2700 A1 Jamin Lin via
2025-03-03 9:54 ` [PATCH v4 01/23] hw/intc/aspeed: Support setting different memory size Jamin Lin via
2025-03-03 9:54 ` [PATCH v4 02/23] hw/intc/aspeed: Support setting different register sizes Jamin Lin via
2025-03-03 13:54 ` Cédric Le Goater
2025-03-04 10:03 ` Jamin Lin
2025-03-04 10:43 ` Cédric Le Goater
2025-03-03 9:54 ` [PATCH v4 03/23] hw/intc/aspeed: Reduce regs array size by adding a register sub-region Jamin Lin via
2025-03-03 14:21 ` Cédric Le Goater
2025-03-05 4:05 ` Jamin Lin
2025-03-03 9:54 ` [PATCH v4 04/23] hw/intc/aspeed: Introduce helper functions for enable and status registers Jamin Lin via
2025-03-03 9:54 ` [PATCH v4 05/23] hw/intc/aspeed: Add object type name to trace events for better debugging Jamin Lin via
2025-03-03 9:54 ` [PATCH v4 06/23] hw/arm/aspeed: Rename IRQ table and machine name for AST2700 A0 Jamin Lin via
2025-03-03 14:23 ` Cédric Le Goater [this message]
2025-03-04 2:55 ` Jamin Lin
2025-03-03 9:54 ` [PATCH v4 07/23] hw/arm/aspeed_ast27x0: Sort the IRQ table by IRQ number Jamin Lin via
2025-03-03 9:54 ` [PATCH v4 08/23] hw/intc/aspeed: Support different memory region ops Jamin Lin via
2025-03-03 9:54 ` [PATCH v4 09/23] hw/intc/aspeed: Rename num_ints to num_inpins for clarity Jamin Lin via
2025-03-03 9:54 ` [PATCH v4 10/23] hw/intc/aspeed: Add support for multiple output pins in INTC Jamin Lin via
2025-03-03 9:54 ` [PATCH v4 11/23] hw/intc/aspeed: Refactor INTC to support separate input and output pin indices Jamin Lin via
2025-03-03 9:54 ` [PATCH v4 12/23] hw/intc/aspeed: Introduce AspeedINTCIRQ structure to save the irq index and register address Jamin Lin via
2025-03-04 6:52 ` Cédric Le Goater
2025-03-05 5:24 ` Jamin Lin
2025-03-03 9:54 ` [PATCH v4 13/23] hw/intc/aspeed: Introduce IRQ handler function to reduce code duplication Jamin Lin via
2025-03-03 9:54 ` [PATCH v4 14/23] hw/intc/aspeed: Add Support for Multi-Output IRQ Handling Jamin Lin via
2025-03-04 7:21 ` Cédric Le Goater
2025-03-06 2:26 ` Jamin Lin
2025-03-03 9:54 ` [PATCH v4 15/23] hw/intc/aspeed: Add Support for AST2700 INTCIO Controller Jamin Lin via
2025-03-04 7:08 ` Cédric Le Goater
2025-03-03 9:54 ` [PATCH v4 16/23] hw/misc/aspeed_scu: Add Support for AST2700/AST2750 A1 Silicon Revisions Jamin Lin via
2025-03-03 9:54 ` [PATCH v4 17/23] hw/arm/aspeed_ast27x0.c Support AST2700 A1 GIC Interrupt Mapping Jamin Lin via
2025-03-04 7:12 ` Cédric Le Goater
2025-03-06 6:32 ` Jamin Lin
2025-03-03 9:54 ` [PATCH v4 18/23] hw/arm/aspeed_ast27x0: Support two levels of INTC controllers for AST2700 A1 Jamin Lin via
2025-03-04 7:17 ` Cédric Le Goater
2025-03-06 8:29 ` Jamin Lin
2025-03-03 9:54 ` [PATCH v4 19/23] hw/arm/aspeed: Add SoC and Machine Support " Jamin Lin via
2025-03-03 17:41 ` Cédric Le Goater
2025-03-04 5:30 ` Jamin Lin
2025-03-03 9:54 ` [PATCH v4 20/23] tests/functional/aspeed: Introduce start_ast2700_test API and update hwmon path Jamin Lin via
2025-03-03 16:47 ` Cédric Le Goater
2025-03-04 3:33 ` Jamin Lin
2025-03-03 9:54 ` [PATCH v4 21/23] tests/functional/aspeed: Update test ASPEED SDK v09.05 Jamin Lin via
2025-03-03 16:50 ` Cédric Le Goater
2025-03-04 3:48 ` Jamin Lin
2025-03-03 9:54 ` [PATCH v4 22/23] tests/functional/aspeed: Add test case for AST2700 A1 Jamin Lin via
2025-03-03 16:50 ` Cédric Le Goater
2025-03-03 9:54 ` [PATCH v4 23/23] docs/specs: Add aspeed-intc Jamin Lin via
2025-03-04 7:26 ` Cédric Le Goater
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