From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v3 1/3] target/arm: Introduce arm_hcr_el2_eff
Date: Mon, 10 Dec 2018 08:53:31 -0600 [thread overview]
Message-ID: <ee87a667-c203-922d-fb28-726e70e74eda@linaro.org> (raw)
In-Reply-To: <CAFEAcA9HSrGX2PR8DieF6Fa8x2fHk1xnnismNvcMpaSQ4U9dMA@mail.gmail.com>
On 12/10/18 8:22 AM, Peter Maydell wrote:
> This section that clears VI/VF/VSE is new, and I'm not sure it's right.
> The spec says that the virtual IRQ interrupt is enabled only if {TGE,IMO}
> is {0,1}, but the meaning of the bit is "pending", and an interrupt
> can be pending without being enabled. Ditto VF, VSE.
Fair enough. I can re-send with this section removed.
r~
next prev parent reply other threads:[~2018-12-10 14:53 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-06 17:55 [Qemu-devel] [PATCH v3 0/3] target/arm: ARMv8.1-LOR Richard Henderson
2018-12-06 17:55 ` [Qemu-devel] [PATCH v3 1/3] target/arm: Introduce arm_hcr_el2_eff Richard Henderson
2018-12-10 14:22 ` Peter Maydell
2018-12-10 14:53 ` Richard Henderson [this message]
2018-12-06 17:55 ` [Qemu-devel] [PATCH v3 2/3] target/arm: Use arm_hcr_el2_eff more places Richard Henderson
2018-12-10 14:43 ` Peter Maydell
2018-12-06 17:55 ` [Qemu-devel] [PATCH v3 3/3] target/arm: Implement the ARMv8.1-LOR extension Richard Henderson
2018-12-10 14:46 ` Peter Maydell
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