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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4298b996aaasm579621f8f.3.2025.10.22.23.46.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 22 Oct 2025 23:46:07 -0700 (PDT) Message-ID: Date: Thu, 23 Oct 2025 08:46:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 08/12] hw/ppc/pegasos2: Move hardware specific parts out of machine reset Content-Language: en-US To: BALATON Zoltan , qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Nicholas Piggin , Markus Armbruster , Harsh Prateek Bora References: From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 23/10/25 02:06, BALATON Zoltan wrote: > Move the pegasos2 specific chipset reset out from machine reset to a > separate function and move generic parts that are not pegasos2 > specific from build_fdt to machine reset so now build_fdt only > contains pegasos2 specific parts and can be renamed accordingly. > > Signed-off-by: BALATON Zoltan > --- > hw/ppc/pegasos2.c | 79 ++++++++++++++++++++++++----------------------- > 1 file changed, 41 insertions(+), 38 deletions(-) > -#define PCI1_IO_BASE 0xfe000000 Can't we keep such definition? > @@ -308,23 +307,12 @@ static void pegasos2_pci_config_write(Pegasos2MachineState *pm, int bus, > > static void pegasos2_superio_write(uint8_t addr, uint8_t val) > { > - cpu_physical_memory_write(PCI1_IO_BASE + 0x3f0, &addr, 1); > - cpu_physical_memory_write(PCI1_IO_BASE + 0x3f1, &val, 1); > + cpu_physical_memory_write(0xfe0003f0, &addr, 1); > + cpu_physical_memory_write(0xfe0003f1, &val, 1); Otherwise it is harder to notice we are accessing the MMIO mapped ISA space. > } Consider renaming as pegasos_superio_write() since this method becomes common to PegasOS I and II. Reviewed-by: Philippe Mathieu-Daudé