* [RFC PATCH-for-9.0] hw/display/qxl: Directly use VGACommonState::vram_size
@ 2023-11-24 19:22 Philippe Mathieu-Daudé
2023-12-13 17:37 ` Philippe Mathieu-Daudé
2024-01-04 16:45 ` Philippe Mathieu-Daudé
0 siblings, 2 replies; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-24 19:22 UTC (permalink / raw)
To: qemu-devel; +Cc: Gerd Hoffmann, Philippe Mathieu-Daudé
PCIQXLDevice::vram_size seems to be some shadow of
VGACommonState::vram_size. Just use the latter.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
RFC: I don't understand this field otherwise.
---
hw/display/qxl.h | 1 -
hw/display/qxl.c | 17 ++++++++---------
2 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/hw/display/qxl.h b/hw/display/qxl.h
index fdac14edad..47463bd485 100644
--- a/hw/display/qxl.h
+++ b/hw/display/qxl.h
@@ -102,7 +102,6 @@ struct PCIQXLDevice {
uint16_t max_outputs;
/* vram pci bar */
- uint64_t vram_size;
MemoryRegion vram_bar;
uint64_t vram32_size;
MemoryRegion vram32_bar;
diff --git a/hw/display/qxl.c b/hw/display/qxl.c
index 7bb00d68f5..0e1c4efc0c 100644
--- a/hw/display/qxl.c
+++ b/hw/display/qxl.c
@@ -2067,20 +2067,19 @@ static void qxl_init_ramsize(PCIQXLDevice *qxl)
/* vram (surfaces, 64bit, bar 4+5) */
if (qxl->vram_size_mb != -1) {
- qxl->vram_size = (uint64_t)qxl->vram_size_mb * MiB;
+ qxl->vga.vram_size = (uint64_t)qxl->vram_size_mb * MiB;
}
- if (qxl->vram_size < qxl->vram32_size) {
- qxl->vram_size = qxl->vram32_size;
+ if (qxl->vga.vram_size < qxl->vram32_size) {
+ qxl->vga.vram_size = qxl->vram32_size;
}
if (qxl->revision == 1) {
qxl->vram32_size = 4096;
- qxl->vram_size = 4096;
+ qxl->vga.vram_size = 4096;
}
qxl->vgamem_size = pow2ceil(qxl->vgamem_size);
qxl->vga.vram_size = pow2ceil(qxl->vga.vram_size);
qxl->vram32_size = pow2ceil(qxl->vram32_size);
- qxl->vram_size = pow2ceil(qxl->vram_size);
}
static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
@@ -2135,7 +2134,7 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
qxl->guest_surfaces.cmds = g_new0(QXLPHYSICAL, qxl->ssd.num_surfaces);
memory_region_init_ram(&qxl->vram_bar, OBJECT(qxl), "qxl.vram",
- qxl->vram_size, &error_fatal);
+ qxl->vga.vram_size, &error_fatal);
memory_region_init_alias(&qxl->vram32_bar, OBJECT(qxl), "qxl.vram32",
&qxl->vram_bar, 0, qxl->vram32_size);
@@ -2159,7 +2158,7 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
pci_register_bar(&qxl->pci, QXL_VRAM_RANGE_INDEX,
PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->vram32_bar);
- if (qxl->vram32_size < qxl->vram_size) {
+ if (qxl->vram32_size < qxl->vga.vram_size) {
/*
* Make the 64bit vram bar show up only in case it is
* configured to be larger than the 32bit vram bar.
@@ -2177,8 +2176,8 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
dprint(qxl, 1, "vram/32: %" PRIx64 " MB [region 1]\n",
qxl->vram32_size / MiB);
dprint(qxl, 1, "vram/64: %" PRIx64 " MB %s\n",
- qxl->vram_size / MiB,
- qxl->vram32_size < qxl->vram_size ? "[region 4]" : "[unmapped]");
+ qxl->vga.vram_size / MiB,
+ qxl->vram32_size < qxl->vga.vram_size ? "[region 4]" : "[unmapped]");
qxl->ssd.qxl.base.sif = &qxl_interface.base;
if (qemu_spice_add_display_interface(&qxl->ssd.qxl, qxl->vga.con) != 0) {
--
2.41.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [RFC PATCH-for-9.0] hw/display/qxl: Directly use VGACommonState::vram_size
2023-11-24 19:22 [RFC PATCH-for-9.0] hw/display/qxl: Directly use VGACommonState::vram_size Philippe Mathieu-Daudé
@ 2023-12-13 17:37 ` Philippe Mathieu-Daudé
2024-01-04 16:45 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-12-13 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Gerd Hoffmann, Peter Maydell, Marc-André Lureau
ping?
On 24/11/23 20:22, Philippe Mathieu-Daudé wrote:
> PCIQXLDevice::vram_size seems to be some shadow of
> VGACommonState::vram_size. Just use the latter.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> RFC: I don't understand this field otherwise.
> ---
> hw/display/qxl.h | 1 -
> hw/display/qxl.c | 17 ++++++++---------
> 2 files changed, 8 insertions(+), 10 deletions(-)
>
> diff --git a/hw/display/qxl.h b/hw/display/qxl.h
> index fdac14edad..47463bd485 100644
> --- a/hw/display/qxl.h
> +++ b/hw/display/qxl.h
> @@ -102,7 +102,6 @@ struct PCIQXLDevice {
> uint16_t max_outputs;
>
> /* vram pci bar */
> - uint64_t vram_size;
> MemoryRegion vram_bar;
> uint64_t vram32_size;
> MemoryRegion vram32_bar;
> diff --git a/hw/display/qxl.c b/hw/display/qxl.c
> index 7bb00d68f5..0e1c4efc0c 100644
> --- a/hw/display/qxl.c
> +++ b/hw/display/qxl.c
> @@ -2067,20 +2067,19 @@ static void qxl_init_ramsize(PCIQXLDevice *qxl)
>
> /* vram (surfaces, 64bit, bar 4+5) */
> if (qxl->vram_size_mb != -1) {
> - qxl->vram_size = (uint64_t)qxl->vram_size_mb * MiB;
> + qxl->vga.vram_size = (uint64_t)qxl->vram_size_mb * MiB;
> }
> - if (qxl->vram_size < qxl->vram32_size) {
> - qxl->vram_size = qxl->vram32_size;
> + if (qxl->vga.vram_size < qxl->vram32_size) {
> + qxl->vga.vram_size = qxl->vram32_size;
> }
>
> if (qxl->revision == 1) {
> qxl->vram32_size = 4096;
> - qxl->vram_size = 4096;
> + qxl->vga.vram_size = 4096;
> }
> qxl->vgamem_size = pow2ceil(qxl->vgamem_size);
> qxl->vga.vram_size = pow2ceil(qxl->vga.vram_size);
> qxl->vram32_size = pow2ceil(qxl->vram32_size);
> - qxl->vram_size = pow2ceil(qxl->vram_size);
> }
>
> static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
> @@ -2135,7 +2134,7 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
>
> qxl->guest_surfaces.cmds = g_new0(QXLPHYSICAL, qxl->ssd.num_surfaces);
> memory_region_init_ram(&qxl->vram_bar, OBJECT(qxl), "qxl.vram",
> - qxl->vram_size, &error_fatal);
> + qxl->vga.vram_size, &error_fatal);
> memory_region_init_alias(&qxl->vram32_bar, OBJECT(qxl), "qxl.vram32",
> &qxl->vram_bar, 0, qxl->vram32_size);
>
> @@ -2159,7 +2158,7 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
> pci_register_bar(&qxl->pci, QXL_VRAM_RANGE_INDEX,
> PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->vram32_bar);
>
> - if (qxl->vram32_size < qxl->vram_size) {
> + if (qxl->vram32_size < qxl->vga.vram_size) {
> /*
> * Make the 64bit vram bar show up only in case it is
> * configured to be larger than the 32bit vram bar.
> @@ -2177,8 +2176,8 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
> dprint(qxl, 1, "vram/32: %" PRIx64 " MB [region 1]\n",
> qxl->vram32_size / MiB);
> dprint(qxl, 1, "vram/64: %" PRIx64 " MB %s\n",
> - qxl->vram_size / MiB,
> - qxl->vram32_size < qxl->vram_size ? "[region 4]" : "[unmapped]");
> + qxl->vga.vram_size / MiB,
> + qxl->vram32_size < qxl->vga.vram_size ? "[region 4]" : "[unmapped]");
>
> qxl->ssd.qxl.base.sif = &qxl_interface.base;
> if (qemu_spice_add_display_interface(&qxl->ssd.qxl, qxl->vga.con) != 0) {
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [RFC PATCH-for-9.0] hw/display/qxl: Directly use VGACommonState::vram_size
2023-11-24 19:22 [RFC PATCH-for-9.0] hw/display/qxl: Directly use VGACommonState::vram_size Philippe Mathieu-Daudé
2023-12-13 17:37 ` Philippe Mathieu-Daudé
@ 2024-01-04 16:45 ` Philippe Mathieu-Daudé
2024-01-09 14:48 ` Philippe Mathieu-Daudé
1 sibling, 1 reply; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-04 16:45 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini; +Cc: Gerd Hoffmann
+Paolo
On 24/11/23 20:22, Philippe Mathieu-Daudé wrote:
> PCIQXLDevice::vram_size seems to be some shadow of
> VGACommonState::vram_size. Just use the latter.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> RFC: I don't understand this field otherwise.
> ---
> hw/display/qxl.h | 1 -
> hw/display/qxl.c | 17 ++++++++---------
> 2 files changed, 8 insertions(+), 10 deletions(-)
>
> diff --git a/hw/display/qxl.h b/hw/display/qxl.h
> index fdac14edad..47463bd485 100644
> --- a/hw/display/qxl.h
> +++ b/hw/display/qxl.h
> @@ -102,7 +102,6 @@ struct PCIQXLDevice {
> uint16_t max_outputs;
>
> /* vram pci bar */
> - uint64_t vram_size;
> MemoryRegion vram_bar;
> uint64_t vram32_size;
> MemoryRegion vram32_bar;
> diff --git a/hw/display/qxl.c b/hw/display/qxl.c
> index 7bb00d68f5..0e1c4efc0c 100644
> --- a/hw/display/qxl.c
> +++ b/hw/display/qxl.c
> @@ -2067,20 +2067,19 @@ static void qxl_init_ramsize(PCIQXLDevice *qxl)
>
> /* vram (surfaces, 64bit, bar 4+5) */
> if (qxl->vram_size_mb != -1) {
> - qxl->vram_size = (uint64_t)qxl->vram_size_mb * MiB;
> + qxl->vga.vram_size = (uint64_t)qxl->vram_size_mb * MiB;
> }
> - if (qxl->vram_size < qxl->vram32_size) {
> - qxl->vram_size = qxl->vram32_size;
> + if (qxl->vga.vram_size < qxl->vram32_size) {
> + qxl->vga.vram_size = qxl->vram32_size;
> }
>
> if (qxl->revision == 1) {
> qxl->vram32_size = 4096;
> - qxl->vram_size = 4096;
> + qxl->vga.vram_size = 4096;
> }
> qxl->vgamem_size = pow2ceil(qxl->vgamem_size);
> qxl->vga.vram_size = pow2ceil(qxl->vga.vram_size);
> qxl->vram32_size = pow2ceil(qxl->vram32_size);
> - qxl->vram_size = pow2ceil(qxl->vram_size);
> }
>
> static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
> @@ -2135,7 +2134,7 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
>
> qxl->guest_surfaces.cmds = g_new0(QXLPHYSICAL, qxl->ssd.num_surfaces);
> memory_region_init_ram(&qxl->vram_bar, OBJECT(qxl), "qxl.vram",
> - qxl->vram_size, &error_fatal);
> + qxl->vga.vram_size, &error_fatal);
> memory_region_init_alias(&qxl->vram32_bar, OBJECT(qxl), "qxl.vram32",
> &qxl->vram_bar, 0, qxl->vram32_size);
>
> @@ -2159,7 +2158,7 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
> pci_register_bar(&qxl->pci, QXL_VRAM_RANGE_INDEX,
> PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->vram32_bar);
>
> - if (qxl->vram32_size < qxl->vram_size) {
> + if (qxl->vram32_size < qxl->vga.vram_size) {
> /*
> * Make the 64bit vram bar show up only in case it is
> * configured to be larger than the 32bit vram bar.
> @@ -2177,8 +2176,8 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
> dprint(qxl, 1, "vram/32: %" PRIx64 " MB [region 1]\n",
> qxl->vram32_size / MiB);
> dprint(qxl, 1, "vram/64: %" PRIx64 " MB %s\n",
> - qxl->vram_size / MiB,
> - qxl->vram32_size < qxl->vram_size ? "[region 4]" : "[unmapped]");
> + qxl->vga.vram_size / MiB,
> + qxl->vram32_size < qxl->vga.vram_size ? "[region 4]" : "[unmapped]");
>
> qxl->ssd.qxl.base.sif = &qxl_interface.base;
> if (qemu_spice_add_display_interface(&qxl->ssd.qxl, qxl->vga.con) != 0) {
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [RFC PATCH-for-9.0] hw/display/qxl: Directly use VGACommonState::vram_size
2024-01-04 16:45 ` Philippe Mathieu-Daudé
@ 2024-01-09 14:48 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-09 14:48 UTC (permalink / raw)
To: qemu-devel, Marc-André Lureau; +Cc: Gerd Hoffmann, Paolo Bonzini
+Marc-André
On 4/1/24 17:45, Philippe Mathieu-Daudé wrote:
> +Paolo
>
> On 24/11/23 20:22, Philippe Mathieu-Daudé wrote:
>> PCIQXLDevice::vram_size seems to be some shadow of
>> VGACommonState::vram_size. Just use the latter.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>> RFC: I don't understand this field otherwise.
>> ---
>> hw/display/qxl.h | 1 -
>> hw/display/qxl.c | 17 ++++++++---------
>> 2 files changed, 8 insertions(+), 10 deletions(-)
>>
>> diff --git a/hw/display/qxl.h b/hw/display/qxl.h
>> index fdac14edad..47463bd485 100644
>> --- a/hw/display/qxl.h
>> +++ b/hw/display/qxl.h
>> @@ -102,7 +102,6 @@ struct PCIQXLDevice {
>> uint16_t max_outputs;
>> /* vram pci bar */
>> - uint64_t vram_size;
>> MemoryRegion vram_bar;
>> uint64_t vram32_size;
>> MemoryRegion vram32_bar;
>> diff --git a/hw/display/qxl.c b/hw/display/qxl.c
>> index 7bb00d68f5..0e1c4efc0c 100644
>> --- a/hw/display/qxl.c
>> +++ b/hw/display/qxl.c
>> @@ -2067,20 +2067,19 @@ static void qxl_init_ramsize(PCIQXLDevice *qxl)
>> /* vram (surfaces, 64bit, bar 4+5) */
>> if (qxl->vram_size_mb != -1) {
>> - qxl->vram_size = (uint64_t)qxl->vram_size_mb * MiB;
>> + qxl->vga.vram_size = (uint64_t)qxl->vram_size_mb * MiB;
>> }
>> - if (qxl->vram_size < qxl->vram32_size) {
>> - qxl->vram_size = qxl->vram32_size;
>> + if (qxl->vga.vram_size < qxl->vram32_size) {
>> + qxl->vga.vram_size = qxl->vram32_size;
>> }
>> if (qxl->revision == 1) {
>> qxl->vram32_size = 4096;
>> - qxl->vram_size = 4096;
>> + qxl->vga.vram_size = 4096;
>> }
>> qxl->vgamem_size = pow2ceil(qxl->vgamem_size);
>> qxl->vga.vram_size = pow2ceil(qxl->vga.vram_size);
>> qxl->vram32_size = pow2ceil(qxl->vram32_size);
>> - qxl->vram_size = pow2ceil(qxl->vram_size);
>> }
>> static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
>> @@ -2135,7 +2134,7 @@ static void qxl_realize_common(PCIQXLDevice
>> *qxl, Error **errp)
>> qxl->guest_surfaces.cmds = g_new0(QXLPHYSICAL,
>> qxl->ssd.num_surfaces);
>> memory_region_init_ram(&qxl->vram_bar, OBJECT(qxl), "qxl.vram",
>> - qxl->vram_size, &error_fatal);
>> + qxl->vga.vram_size, &error_fatal);
>> memory_region_init_alias(&qxl->vram32_bar, OBJECT(qxl),
>> "qxl.vram32",
>> &qxl->vram_bar, 0, qxl->vram32_size);
>> @@ -2159,7 +2158,7 @@ static void qxl_realize_common(PCIQXLDevice
>> *qxl, Error **errp)
>> pci_register_bar(&qxl->pci, QXL_VRAM_RANGE_INDEX,
>> PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->vram32_bar);
>> - if (qxl->vram32_size < qxl->vram_size) {
>> + if (qxl->vram32_size < qxl->vga.vram_size) {
>> /*
>> * Make the 64bit vram bar show up only in case it is
>> * configured to be larger than the 32bit vram bar.
>> @@ -2177,8 +2176,8 @@ static void qxl_realize_common(PCIQXLDevice
>> *qxl, Error **errp)
>> dprint(qxl, 1, "vram/32: %" PRIx64 " MB [region 1]\n",
>> qxl->vram32_size / MiB);
>> dprint(qxl, 1, "vram/64: %" PRIx64 " MB %s\n",
>> - qxl->vram_size / MiB,
>> - qxl->vram32_size < qxl->vram_size ? "[region 4]" :
>> "[unmapped]");
>> + qxl->vga.vram_size / MiB,
>> + qxl->vram32_size < qxl->vga.vram_size ? "[region 4]" :
>> "[unmapped]");
>> qxl->ssd.qxl.base.sif = &qxl_interface.base;
>> if (qemu_spice_add_display_interface(&qxl->ssd.qxl,
>> qxl->vga.con) != 0) {
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2024-01-09 14:49 UTC | newest]
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2023-11-24 19:22 [RFC PATCH-for-9.0] hw/display/qxl: Directly use VGACommonState::vram_size Philippe Mathieu-Daudé
2023-12-13 17:37 ` Philippe Mathieu-Daudé
2024-01-04 16:45 ` Philippe Mathieu-Daudé
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