Re: [PATCH v3 09/23] hw/uefi: add var-service-core.c

[Alexander Graf <graf@amazon.com>]

On 14.02.25 12:16, Gerd Hoffmann wrote:
> On Fri, Feb 14, 2025 at 10:51:17AM +0100, Alexander Graf wrote:
>
>> I also like to have dedicated register spaces per component. So even if you
>> choose to make it a hard split, I think we're better off with 4k at
>> 0xfef10000 for control and 64k at 0xfef20000 for the buffer for example.
> Well, if we go for PIO transfer mode instead of device memory we don't
> need map the buffer any more.
>
> The control registers for the x86 variant are in io address space right
> now (0x520, next to fw_cfg).  We could place them in a mmio page @
> 0xfef10000 instead.  Any preference, and if so, why?


I did the same mistake in my version and use PIO for x86 but MMIO for 
ARM. In hindsight, I think the same mechanism for both would have 
simplified things a lot: You get better testing coverage of the exact 
same code path. If you split between PIO and MMIO, you always have 
issues that only pop up in one of the implementations. It complexifies 
your test matrix for little gain.

Since you need an MMIO avenue anyway, you may as well always use that. 
This is not a high performance interface where the exit latency 
difference between PIO and MMIO really matters.


Alex