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From: "Cédric Le Goater" <clg@kaod.org>
To: Jamin Lin <jamin_lin@aspeedtech.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Andrew Jeffery <andrew@codeconstruct.com.au>,
	Joel Stanley <joel@jms.id.au>,
	Alistair Francis <alistair@alistair23.me>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: troy_lee@aspeedtech.com, yunlin.tang@aspeedtech.com
Subject: Re: [PATCH v2 8/9] aspeed: Add an AST2700 eval board
Date: Mon, 4 Mar 2024 16:39:38 +0100	[thread overview]
Message-ID: <eeda8073-a8bb-4f33-b69d-20dec408e8ed@kaod.org> (raw)
In-Reply-To: <20240304092934.1953198-9-jamin_lin@aspeedtech.com>

On 3/4/24 10:29, Jamin Lin wrote:
> AST2700 CPU is ARM Cortex-A35 which is 64 bits.
> Add TARGET_AARCH64 to build this machine.
> 
> According to the design of ast2700, it has a bootmcu(riscv-32) which
> is used for executing SPL.
> Then, CPUs(cortex-a35) execute u-boot, kernel and rofs.
> 
> Currently, qemu not support emulate two CPU architectures
> at the same machine. Therefore, qemu will only support
> to emulate CPU(cortex-a35) side for ast2700
> 
> Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
>   hw/arm/aspeed.c | 32 ++++++++++++++++++++++++++++++++
>   1 file changed, 32 insertions(+)
> 
> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
> index 8854581ca8..4544026d14 100644
> --- a/hw/arm/aspeed.c
> +++ b/hw/arm/aspeed.c
> @@ -178,6 +178,12 @@ struct AspeedMachineState {
>   #define AST2600_EVB_HW_STRAP1 0x000000C0
>   #define AST2600_EVB_HW_STRAP2 0x00000003
>   
> +#ifdef TARGET_AARCH64
> +/* AST2700 evb hardware value */
> +#define AST2700_EVB_HW_STRAP1 0x000000C0
> +#define AST2700_EVB_HW_STRAP2 0x00000003
> +#endif
> +
>   /* Tacoma hardware value */
>   #define TACOMA_BMC_HW_STRAP1  0x00000000
>   #define TACOMA_BMC_HW_STRAP2  0x00000040
> @@ -1588,6 +1594,26 @@ static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
>       aspeed_machine_class_init_cpus_defaults(mc);
>   }
>   
> +#ifdef TARGET_AARCH64
> +static void aspeed_machine_ast2700_evb_class_init(ObjectClass *oc, void *data)
> +{
> +    MachineClass *mc = MACHINE_CLASS(oc);
> +    AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
> +
> +    mc->desc = "Aspeed AST2700 EVB (Cortex-A35)";
> +    amc->soc_name  = "ast2700-a0";
> +    amc->hw_strap1 = AST2700_EVB_HW_STRAP1;
> +    amc->hw_strap2 = AST2700_EVB_HW_STRAP2;
> +    amc->fmc_model = "w25q01jvq";
> +    amc->spi_model = "w25q512jv";
> +    amc->num_cs    = 2;
> +    amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON;
> +    amc->uart_default = ASPEED_DEV_UART12;
> +    mc->default_ram_size = 1 * GiB;

This seems low. What's the size on real HW  ?

Anyhow,


Reviewed-by: Cédric Le Goater <clg@kaod.org>

Thanks,

C.


> +    aspeed_machine_class_init_cpus_defaults(mc);
> +}
> +#endif
> +
>   static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
>                                                        void *data)
>   {
> @@ -1711,6 +1737,12 @@ static const TypeInfo aspeed_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("ast1030-evb"),
>           .parent         = TYPE_ASPEED_MACHINE,
>           .class_init     = aspeed_minibmc_machine_ast1030_evb_class_init,
> +#ifdef TARGET_AARCH64
> +    }, {
> +        .name          = MACHINE_TYPE_NAME("ast2700-evb"),
> +        .parent        = TYPE_ASPEED_MACHINE,
> +        .class_init    = aspeed_machine_ast2700_evb_class_init,
> +#endif
>       }, {
>           .name          = TYPE_ASPEED_MACHINE,
>           .parent        = TYPE_MACHINE,



  parent reply	other threads:[~2024-03-04 15:40 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-04  9:29 [PATCH v2 0/9] Add AST2700 support Jamin Lin via
2024-03-04  9:29 ` [PATCH v2 3/9] aspeed/sdmc: " Jamin Lin via
2024-03-04 14:47   ` Cédric Le Goater
2024-03-11  7:21     ` Jamin Lin
2024-03-11 14:57       ` Cédric Le Goater
2024-03-12  3:42         ` Jamin Lin
2024-03-04  9:29 ` [PATCH v2 4/9] aspeed/smc: " Jamin Lin via
2024-03-04 15:19   ` Cédric Le Goater
2024-03-12  9:58     ` Jamin Lin
2024-03-04  9:29 ` [PATCH v2 5/9] aspeed/scu: " Jamin Lin via
2024-03-04 15:37   ` Cédric Le Goater
2024-03-04  9:29 ` [PATCH v2 6/9] aspeed/intc: " Jamin Lin via
     [not found] ` <20240304092934.1953198-2-jamin_lin@aspeedtech.com>
2024-03-04 14:32   ` [PATCH v2 1/9] aspeed/wdt: " Cédric Le Goater
2024-03-05  3:08     ` Jamin Lin
     [not found] ` <20240304092934.1953198-3-jamin_lin@aspeedtech.com>
2024-03-04 14:36   ` [PATCH v2 2/9] aspeed/sli: " Cédric Le Goater
2024-03-05  3:28     ` Jamin Lin
     [not found] ` <20240304092934.1953198-9-jamin_lin@aspeedtech.com>
2024-03-04 15:39   ` Cédric Le Goater [this message]
2024-03-05  5:08     ` [PATCH v2 8/9] aspeed: Add an AST2700 eval board Jamin Lin
     [not found] ` <20240304092934.1953198-8-jamin_lin@aspeedtech.com>
2024-03-04 15:49   ` [PATCH v2 7/9] aspeed/soc: Add AST2700 support Cédric Le Goater
2024-03-11 10:31     ` Jamin Lin
2024-03-04 15:54 ` [PATCH v2 0/9] " Cédric Le Goater
2024-03-05  3:38   ` Jamin Lin
2024-03-07 10:42     ` Cédric Le Goater
2024-03-11  1:14       ` Jamin Lin

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