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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id k6sm7329224pfi.119.2019.12.12.06.36.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Dec 2019 06:36:41 -0800 (PST) Subject: Re: [PATCH v2] target/arm: ensure we use current exception state after SCR update To: =?UTF-8?Q?Alex_Benn=c3=a9e?= , qemu-devel@nongnu.org References: <20191212114734.6962-1-alex.bennee@linaro.org> From: Richard Henderson Message-ID: Date: Thu, 12 Dec 2019 06:36:39 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.1 MIME-Version: 1.0 In-Reply-To: <20191212114734.6962-1-alex.bennee@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/12/19 3:47 AM, Alex Bennée wrote: > A write to the SCR can change the effective EL by droppping the system > from secure to non-secure mode. However if we use a cached current_el > from before the change we'll rebuild the flags incorrectly. To fix > this we introduce the ARM_CP_NEWEL CP flag to indicate the new EL > should be used when recomputing the flags. > > Signed-off-by: Alex Bennée > Tested-by: Philippe Mathieu-Daudé > Cc: Richard Henderson > Message-Id: <20191209143723.6368-1-alex.bennee@linaro.org> > > --- > v2 > - don't override a ARM_CP_SPECIAL, use a new flag > --- > target/arm/cpu.h | 8 ++++++-- > target/arm/helper.h | 1 + > target/arm/helper.c | 14 +++++++++++++- > target/arm/translate.c | 6 +++++- > 4 files changed, 25 insertions(+), 4 deletions(-) Reviewed-by: Richard Henderson > if (arm_dc_feature(s, ARM_FEATURE_M)) { > gen_helper_rebuild_hflags_m32(cpu_env, tcg_el); > } else { > - gen_helper_rebuild_hflags_a32(cpu_env, tcg_el); > + if (ri->type & ARM_CP_NEWEL) { > + gen_helper_rebuild_hflags_a32_newel(cpu_env); > + } else { > + gen_helper_rebuild_hflags_a32(cpu_env, tcg_el); > + } > } If you tweak this again, an else if would be appropriate. r~