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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-429952d5768sm19974464f8f.24.2025.10.28.03.05.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Oct 2025 03:05:01 -0700 (PDT) Message-ID: Date: Tue, 28 Oct 2025 11:05:00 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RESEND PATCH 1/7] target/arm/machine: Improve traces on register mismatch during migration Content-Language: en-US To: Cornelia Huck , eric.auger.pro@gmail.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, maz@kernel.org, oliver.upton@linux.dev, sebott@redhat.com, gshan@redhat.com, ddutile@redhat.com, peterx@redhat.com, philmd@linaro.org, pbonzini@redhat.com References: <20251016140039.250111-1-eric.auger@redhat.com> <20251016140039.250111-2-eric.auger@redhat.com> <877bwtvaj7.fsf@redhat.com> From: Eric Auger In-Reply-To: <877bwtvaj7.fsf@redhat.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Connie, On 10/17/25 4:59 PM, Cornelia Huck wrote: > On Thu, Oct 16 2025, Eric Auger wrote: > > More information is really valuable here. I have some nits :) > >> Currently whenthe number of KVM registers exposed by the source is > s/whenthe/when the/ > >> larger than the one exposed on the destination, the migration fails >> with: "failed to load cpu:cpreg_vmstate_array_len" >> >> This gives no information about which registers are causing the trouble. >> >> This patches rework the target/arm/machine code so that it becomes > s/patches rework/patch reworks/ > >> able to handle an input stream with a larger set of registers than >> the destination and print useful information about which registers >> are causing the trouble. The migration outcome is unchanged: >> - unexpected registers still will fail the migration >> - missing ones are print but will not fail the migration, as done today. > s/print/printed/ > >> The input stream can contain MAX_CPREG_VMSTATE_ANOMALIES(10) extra >> registers compared to what exists on the target. >> >> If there are more registers we will still hit the previous >> "load cpu:cpreg_vmstate_array_len" error. >> >> At most, MAX_CPREG_VMSTATE_ANOMALIES missing registers >> and MAX_CPREG_VMSTATE_ANOMALIES unexpected registers are print. > s/print/printed/ > > If we really get tons of register discrepancies, I'd expect the reason for > that to be something more obvious, so limiting should be fine. > >> Example: >> >> qemu-system-aarch64: kvm_arm_cpu_post_load Missing register in input stream: 0 0x6030000000160003 fw feat reg 3 >> qemu-system-aarch64: kvm_arm_cpu_post_load Unexpected register in input stream: 0 0x603000000013c103 op0:3 op1:0 crn:2 crm:0 op2:3 >> qemu-system-aarch64: kvm_arm_cpu_post_load Unexpected register in input stream: 1 0x603000000013c512 op0:3 op1:0 crn:10 crm:2 op2:2 >> qemu-system-aarch64: kvm_arm_cpu_post_load Unexpected register in input stream: 2 0x603000000013c513 op0:3 op1:0 crn:10 crm:2 op2:3 >> qemu-system-aarch64: error while loading state for instance 0x0 of device 'cpu' >> qemu-system-aarch64: load of migration failed: Operation not permitted >> >> Signed-off-by: Eric Auger >> --- >> target/arm/cpu.h | 6 +++++ >> target/arm/kvm.c | 23 ++++++++++++++++ >> target/arm/machine.c | 58 ++++++++++++++++++++++++++++++++++++----- >> target/arm/trace-events | 7 +++++ >> 4 files changed, 88 insertions(+), 6 deletions(-) >> >> diff --git a/target/arm/cpu.h b/target/arm/cpu.h >> index bf221e6f97..a7ed3f34f8 100644 >> --- a/target/arm/cpu.h >> +++ b/target/arm/cpu.h >> @@ -936,6 +936,12 @@ struct ArchCPU { >> uint64_t *cpreg_vmstate_values; >> int32_t cpreg_vmstate_array_len; >> >> + #define MAX_CPREG_VMSTATE_ANOMALIES 10 >> + uint64_t cpreg_vmstate_missing_indexes[MAX_CPREG_VMSTATE_ANOMALIES]; >> + int32_t cpreg_vmstate_missing_indexes_array_len; >> + uint64_t cpreg_vmstate_unexpected_indexes[MAX_CPREG_VMSTATE_ANOMALIES]; >> + int32_t cpreg_vmstate_unexpected_indexes_array_len; > "indices"? Thanks, all those will be fixed in next version. Thanks Eric > >> + >> DynamicGDBFeatureInfo dyn_sysreg_feature; >> DynamicGDBFeatureInfo dyn_svereg_feature; >> DynamicGDBFeatureInfo dyn_smereg_feature; > (...) >