From: Richard Henderson <richard.henderson@linaro.org>
To: Victor Colombo <victor.colombo@eldorado.org.br>,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: danielhb413@gmail.com, matheus.ferst@eldorado.org.br,
groug@kaod.org, david@gibson.dropbear.id.au, clg@kaod.org
Subject: Re: [PATCH 3/4] target/ppc: fix xscvqpdp register access
Date: Sat, 11 Dec 2021 09:05:06 -0800 [thread overview]
Message-ID: <ef6ea7ef-e07b-8336-fe3c-8dca1f8c9ddb@linaro.org> (raw)
In-Reply-To: <20211210141347.38603-4-victor.colombo@eldorado.org.br>
On 12/10/21 6:13 AM, Victor Colombo wrote:
> From: Matheus Ferst<matheus.ferst@eldorado.org.br>
>
> This instruction has VRT and VRB fields instead of T/TX and B/BX.
>
> Signed-off-by: Matheus Ferst<matheus.ferst@eldorado.org.br>
> ---
> target/ppc/translate/vsx-impl.c.inc | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2021-12-11 17:08 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-10 14:13 [PATCH 0/4] target/ppc: Fix VSX instructions register access Victor Colombo
2021-12-10 14:13 ` [PATCH 1/4] target/ppc: Fix xs{max,min}[cj]dp to use VSX registers Victor Colombo
2021-12-11 17:02 ` Richard Henderson
2021-12-10 14:13 ` [PATCH 2/4] target/ppc: Move xs{max,min}[cj]dp to decodetree Victor Colombo
2021-12-11 17:03 ` Richard Henderson
2021-12-10 14:13 ` [PATCH 3/4] target/ppc: fix xscvqpdp register access Victor Colombo
2021-12-11 17:05 ` Richard Henderson [this message]
2021-12-10 14:13 ` [PATCH 4/4] target/ppc: move xscvqpdp to decodetree Victor Colombo
2021-12-10 16:19 ` Matheus K. Ferst
2021-12-11 17:07 ` Richard Henderson
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