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([2001:b07:6468:f312:b55d:5ed2:8a41:41ea]) by smtp.gmail.com with ESMTPSA id n11sm18201469wrg.72.2020.03.30.05.43.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 30 Mar 2020 05:43:01 -0700 (PDT) Subject: Re: [PATCH] i386: hvf: Reset IRQ inhibition after moving RIP To: Roman Bolshakov , qemu-devel@nongnu.org References: <20200328174411.51491-1-r.bolshakov@yadro.com> From: Paolo Bonzini Message-ID: Date: Mon, 30 Mar 2020 14:43:03 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <20200328174411.51491-1-r.bolshakov@yadro.com> Content-Language: en-US X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 216.205.24.74 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Cameron Esfahani , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 28/03/20 18:44, Roman Bolshakov wrote: > The sequence of instructions exposes an issue: > sti > hlt > > Interrupts cannot be delivered to hvf after hlt instruction cpu because > HF_INHIBIT_IRQ_MASK is set just before hlt is handled and never reset > after moving instruction pointer beyond hlt. > > So, after hvf_vcpu_exec() returns, CPU thread gets locked up forever in > qemu_wait_io_event() (cpu_thread_is_idle() evaluates inhibition > flag and considers the CPU idle if the flag is set). > > Cc: Cameron Esfahani > Signed-off-by: Roman Bolshakov > --- > target/i386/hvf/vmx.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h > index 03d2c79b9c..ce2a1532d5 100644 > --- a/target/i386/hvf/vmx.h > +++ b/target/i386/hvf/vmx.h > @@ -167,6 +167,8 @@ static inline void macvm_set_cr4(hv_vcpuid_t vcpu, uint64_t cr4) > > static inline void macvm_set_rip(CPUState *cpu, uint64_t rip) > { > + X86CPU *x86_cpu = X86_CPU(cpu); > + CPUX86State *env = &x86_cpu->env; > uint64_t val; > > /* BUG, should take considering overlap.. */ > @@ -176,6 +178,7 @@ static inline void macvm_set_rip(CPUState *cpu, uint64_t rip) > val = rvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY); > if (val & (VMCS_INTERRUPTIBILITY_STI_BLOCKING | > VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING)) { > + env->hflags &= ~HF_INHIBIT_IRQ_MASK; > wvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY, > val & ~(VMCS_INTERRUPTIBILITY_STI_BLOCKING | > VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING)); > Queued, thanks! Paolo