Re: [RFC PATCH] target/ppc: Move add and subf type fixed-point arithmetic instructions to decodetree

[Richard Henderson <richard.henderson@linaro.org>]

On 2/9/24 01:35, Chinmay Rath wrote:
> +&Z23_tab_cy     rt ra rb cy
> +@Z23_tab_cy     ...... rt:5 ra:5 rb:5 cy:2 ........ .           &Z23_tab_cy
...
> +ADDEX           011111 ..... ..... ..... .. 10101010 -  @Z23_tab_cy
...
> +static bool trans_ADDEX(DisasContext *ctx, arg_Z23_tab_cy *a)
> +{
> +    gen_op_arith_add(ctx, cpu_gpr[a->rt], cpu_gpr[a->ra], cpu_gpr[a->rb],
> +                     cpu_ov, cpu_ov32, true, true, false, false);
> +    return true;
> +}

CY != 0 is reserved.

While you could diagnose this in trans_ADDEX, it seems cleaner to simply match 00 in the 
CY field until a future ISA defines something else.  All that is required is a comment in 
the decodetree entry.

# Z23-form, with CY=0; all other values for CY are reserved.
# This works out the same as X-form.
ADDEX    011111 ..... ..... ..... 00 10101010 -   @X


r~