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From: Richard Henderson <richard.henderson@linaro.org>
To: Weiwei Li <liweiwei@iscas.ac.cn>,
	qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: palmer@dabbelt.com, alistair.francis@wdc.com,
	bin.meng@windriver.com, dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com, wangjunqiang@iscas.ac.cn,
	lazyparser@gmail.com
Subject: Re: [PATCH v6 4/6] target/riscv: Add support for PC-relative translation
Date: Tue, 4 Apr 2023 06:56:45 -0700	[thread overview]
Message-ID: <f0923f4b-e5e5-b648-6c77-4a5a151a9b6c@linaro.org> (raw)
In-Reply-To: <20230404020653.18911-5-liweiwei@iscas.ac.cn>

On 4/3/23 19:06, Weiwei Li wrote:
>   static bool trans_auipc(DisasContext *ctx, arg_auipc *a)
>   {
> -    gen_set_gpri(ctx, a->rd, a->imm + ctx->base.pc_next);
> +    TCGv target_pc = dest_gpr(ctx, a->rd);
> +    gen_pc_plus_diff(target_pc, ctx, a->imm + ctx->base.pc_next);
> +    gen_set_gpr(ctx, a->rd, target_pc);
>       return true;
>   }

This is not how I expect a function called "pc plus diff" to work.
It should be simpler:


     TCGv rd = dest_gpr(ctx, a->rd);

     gen_pc_plus_diff(ctx, rd, a->imm);
     gen_set_gpr(ctx, a->rd, rd);

All of the manipulation of cpu_pc, pc_save, and pc_next are all hidden inside the 
function.  All that "add upper immediate to pc" should do is supply the immediate.


r~


  parent reply	other threads:[~2023-04-04 13:57 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-04  2:06 [PATCH v6 0/6] target/riscv: Fix pointer mask related support Weiwei Li
2023-04-04  2:06 ` [PATCH v6 1/6] target/riscv: Fix pointer mask transformation for vector address Weiwei Li
2023-04-05  4:38   ` Alistair Francis
2023-04-04  2:06 ` [PATCH v6 2/6] target/riscv: Update cur_pmmask/base when xl changes Weiwei Li
2023-04-05  4:38   ` Alistair Francis
2023-04-04  2:06 ` [PATCH v6 3/6] target/riscv: Fix target address to update badaddr Weiwei Li
2023-04-04  3:06   ` LIU Zhiwei
2023-04-04  3:37     ` liweiwei
2023-04-05  4:41   ` Alistair Francis
2023-04-04  2:06 ` [PATCH v6 4/6] target/riscv: Add support for PC-relative translation Weiwei Li
2023-04-04  3:12   ` LIU Zhiwei
2023-04-04  3:25     ` LIU Zhiwei
2023-04-04  3:46     ` liweiwei
2023-04-04  7:07       ` LIU Zhiwei
2023-04-04  8:48         ` liweiwei
2023-04-04  9:23           ` LIU Zhiwei
2023-04-04 14:05         ` Richard Henderson
2023-04-04 13:56   ` Richard Henderson [this message]
2023-04-04 14:33     ` liweiwei
2023-04-04 14:57       ` Richard Henderson
2023-04-04 15:14         ` liweiwei
2023-04-04 15:27           ` Richard Henderson
2023-04-04 15:39             ` liweiwei
2023-04-04  2:06 ` [PATCH v6 5/6] target/riscv: Enable PC-relative translation in system mode Weiwei Li
2023-04-04  2:06 ` [PATCH v6 6/6] target/riscv: Add pointer mask support for instruction fetch Weiwei Li
2023-04-04  2:52   ` LIU Zhiwei

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