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Thu, 13 Aug 2020 12:59:09 +0200 (CEST) Received: from [148.251.23.173] (ml.mymailcheap.com [148.251.23.173]) by mail20.mymailcheap.com (Postfix) with ESMTP id E6D8C41184; Thu, 13 Aug 2020 10:59:08 +0000 (UTC) Authentication-Results: mail20.mymailcheap.com; dkim=pass (1024-bit key; unprotected) header.d=flygoat.com header.i=@flygoat.com header.b="elxEpcqr"; dkim-atps=neutral AI-Spam-Status: Not processed Received: from [0.0.0.0] (unknown [103.195.6.80]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (2048 bits)) (No client certificate requested) by mail20.mymailcheap.com (Postfix) with ESMTPSA id AFB5841184; Thu, 13 Aug 2020 10:58:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=flygoat.com; s=default; t=1597316342; bh=8VUjeQQn3cjEp6znsX4Za57R9MW/6boSVRk6IkBIpIA=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=elxEpcqr4SZ8X0Rs0ij1dddKje/OmYx3rU8hq5z/w/CkkZsO9b6YMaet0N7T0WDDl qUfFMfKlNeRRNoPx3Z93LuxEh0ZQ24hl26tDozlrmGu9xoXuGYheKCtb8hLXCsVTX2 Ma+k3KP2/N6ODqdQBJrHGNT9Xkhp1/USmS4epbHA= Subject: Re: [PATCH-for-5.2] target/mips: Report unimplemented cache() operations To: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= References: <20200806122612.17167-1-f4bug@amsat.org> <6cecb59e-3a78-907c-cf63-225b4efbca01@amsat.org> From: Jiaxun Yang Message-ID: Date: Thu, 13 Aug 2020 18:58:54 +0800 User-Agent: Mozilla/5.0 (X11; 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SUSPICIOUS_RECIPS(1.50)[]; RCVD_COUNT_TWO(0.00)[2] X-Rspamd-Server: mail20.mymailcheap.com Received-SPF: pass client-ip=217.182.113.132; envelope-from=jiaxun.yang@flygoat.com; helo=relay2.mymailcheap.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/13 06:59:11 X-ACL-Warn: Detected OS = Linux 3.11 and newer X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Aleksandar Rikalo , QEMU Developers , Aleksandar Markovic , Huacai Chen , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" 在 2020/8/11 上午1:21, Philippe Mathieu-Daudé 写道: > On 8/6/20 11:37 PM, Philippe Mathieu-Daudé wrote: >> On 8/6/20 10:51 PM, Peter Maydell wrote: >>> On Thu, 6 Aug 2020 at 21:31, Philippe Mathieu-Daudé wrote: >>>> On 8/6/20 8:01 PM, Jiaxun Yang wrote: >>>>> 在 2020/8/6 下午8:26, Philippe Mathieu-Daudé 写道: >>>>>> We only implement the Index[Store/Load]Tag from the 'cache' opcode. >>>>>> Instead of ignoring the other cache operations, report them as >>>>>> unimplemented. [...] >> On a r10k core it is listed as 'Hit Writeback Invalidate (D)' but here >> this is a 4kEc. The address used is a SRAM shared with a embedded DSP >> on the same SoC. From a RevEng PoV it is helpful to see there is a such >> cache access, as I can separate better the peripheral involved. >> I'm happy using a trace event instead. >> >> Jiaxun, can you list me the list of opcodes QEMU can safely ignore from >> the TCG emulation PoV? That way we can comment them in the code such: Hi Phil, I believe we have nothing to do with all VA Hit based invalidate, writeback, fetch and lock, According to MD00086-2B-MIPS32BIS-AFP, the Code (Bit[20:18]) should be 0b100 (Hit Inavlidate), 0b101(Hit Fill), 0b110 (Hit FB), 0b111 (Fetch and Lock). I'm unsure about what applications expected from Index based ops, so we'd better keep a log for them. What I can say is Linux rarely use Index based ops. Thanks. - Jiaxun