From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35882) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1boYu3-0000hw-7L for qemu-devel@nongnu.org; Mon, 26 Sep 2016 12:37:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1boYtx-00009j-Vh for qemu-devel@nongnu.org; Mon, 26 Sep 2016 12:37:14 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56086) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1boYtx-00009Y-P9 for qemu-devel@nongnu.org; Mon, 26 Sep 2016 12:37:09 -0400 References: <6dfe4c3f-abad-7358-54a6-a3bd27205757@twiddle.net> <3bec9d39-2415-25c8-837d-87d16165b150@suse.de> <84c4e8a0-6f5b-cf09-8000-ffd677537ef8@redhat.com> <0699e3d0-06b2-6ee2-78ed-1d598a143c2b@suse.de> From: Paolo Bonzini Message-ID: Date: Mon, 26 Sep 2016 18:37:04 +0200 MIME-Version: 1.0 In-Reply-To: <0699e3d0-06b2-6ee2-78ed-1d598a143c2b@suse.de> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 00/18] target-riscv: Add full-system emulation support for the RISC-V Instruction Set Architecture (RV64G, RV32G) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Andreas_F=c3=a4rber?= , Richard Henderson , Sagar Karandikar , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, kbastian@mail.uni-paderborn.de On 26/09/2016 18:35, Andreas F=C3=A4rber wrote: > Am 26.09.2016 um 18:24 schrieb Paolo Bonzini: >> On 26/09/2016 18:20, Andreas F=C3=A4rber wrote: >>> Am 26.09.2016 um 18:17 schrieb Richard Henderson: >>>> On 09/26/2016 05:20 AM, Paolo Bonzini wrote: >>>>> On 26/09/2016 12:56, Sagar Karandikar wrote: >>>>>> -cpu-qom.h merged into cpu.h >>>>> >>>>> Please follow the model of other targets. RISCVCPUClass and the >>>>> RISCVCPU typedef should be in cpu-qom.h. >=20 > After discussion with Paolo, the key word here is typedef. It doesn't > make sense to have the struct RISCVCPU in cpu-qom.h (the old approach) > but it makes perfect sense to have struct RISCVCPUClass and typedef > RISCVCPU in a separate cpu-qom.h. Thanks Andreas, and sorry Sagar for the back-and-forth! Paolo