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Mon, 27 Jun 2022 12:03:47 -0400 Received: from mxplan5.mail.ovh.net (unknown [10.108.20.52]) by mo552.mail-out.ovh.net (Postfix) with ESMTPS id 36C9823F9A; Mon, 27 Jun 2022 16:03:43 +0000 (UTC) Received: from kaod.org (37.59.142.106) by DAG4EX1.mxp5.local (172.16.2.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.9; Mon, 27 Jun 2022 18:03:42 +0200 Authentication-Results: garm.ovh; auth=pass (GARM-106R006b0853ed2-4a81-460c-8733-cef02c753d73, 659C98CE65B422D4D127A36693B7EAD6442F0B22) smtp.auth=clg@kaod.org X-OVh-ClientIp: 82.64.250.170 Message-ID: Date: Mon, 27 Jun 2022 18:03:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH v2 7/7] hw/arm/aspeed: firework: add I2C MUXes for VR channels Content-Language: en-US To: Jae Hyun Yoo , Peter Maydell , Titus Rwantare , Andrew Jeffery , Joel Stanley , Patrick Venture , Hao Wu CC: Graeme Gregory , Maheswara Kurapati , , References: <20220627154703.148943-1-quic_jaehyoo@quicinc.com> <20220627154703.148943-8-quic_jaehyoo@quicinc.com> From: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= In-Reply-To: <20220627154703.148943-8-quic_jaehyoo@quicinc.com> Content-Type: text/plain; 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envelope-from=clg@kaod.org; helo=1.mo552.mail-out.ovh.net X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 6/27/22 17:47, Jae Hyun Yoo wrote: > Add 2-level cascaded I2C MUXes for SOC VR channels into the Firework > machine. > > Signed-off-by: Jae Hyun Yoo Reviewed-by: Cédric Le Goater Thanks, C. > --- > Changes in v2: > * None > > hw/arm/aspeed.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c > index cfc322ee30e9..1708a8f3408d 100644 > --- a/hw/arm/aspeed.c > +++ b/hw/arm/aspeed.c > @@ -1002,13 +1002,21 @@ static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc) > static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc) > { > AspeedSoCState *soc = &bmc->soc; > - I2CSlave *therm_mux; > + I2CSlave *therm_mux, *cpuvr_mux; > > /* Create the generic DC-SCM hardware */ > qcom_dc_scm_bmc_i2c_init(bmc); > > /* Now create the Firework specific hardware */ > > + /* I2C7 CPUVR MUX */ > + cpuvr_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), > + "pca9546", 0x70); > + i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 0), "pca9548", 0x72); > + i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 1), "pca9548", 0x72); > + i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 2), "pca9548", 0x72); > + i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 3), "pca9548", 0x72); > + > /* I2C8 Thermal Diodes*/ > therm_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), > "pca9548", 0x70);