From: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
To: Sairaj Kodilkar <sarunkod@amd.com>, qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, richard.henderson@linaro.org,
eduardo@habkost.net, peterx@redhat.com, david@redhat.com,
philmd@linaro.org, mst@redhat.com, marcel.apfelbaum@gmail.com,
alex.williamson@redhat.com, vasant.hegde@amd.com,
suravee.suthikulpanit@amd.com, santosh.shukla@amd.com,
Wei.Huang2@amd.com, joao.m.martins@oracle.com,
boris.ostrovsky@oracle.com
Subject: Re: [PATCH 03/18] amd_iommu: Add support for IOMMU notifier
Date: Wed, 16 Apr 2025 18:17:10 -0400 [thread overview]
Message-ID: <f14bf894-0c95-4bcf-8a7c-25dfa7ebe76d@oracle.com> (raw)
In-Reply-To: <d4c11455-f28f-4052-9042-5d2c2ed9329d@amd.com>
On 4/16/25 8:14 AM, Sairaj Kodilkar wrote:
>> +
>> + /* DMA address translation support */
>> + IOMMUNotifierFlag notifier_flags;
>> + /* entry in list of Address spaces with registered notifiers */
>> + QLIST_ENTRY(AMDVIAddressSpace) next;
>> + /* DMA address translation active */
>> + bool addr_translation;
>
> I dont see any use of addr_translation in current patch.
> maybe define it when you are really need this flag ?
ACK. I can move it to a later patch. My rationale was that this patch is
adding all the new structure members that will be needed, but it makes
sense to split it.
>> return 0;
>> }
>> @@ -1700,6 +1721,7 @@ static void amdvi_sysbus_realize(DeviceState
>> *dev, Error **errp)
>> static const Property amdvi_properties[] = {
>> DEFINE_PROP_BOOL("xtsup", AMDVIState, xtsup, false),
>> + DEFINE_PROP_BOOL("dma-remap", AMDVIState, dma_remap, false),
>> };
>
> Please add a description in commit message for this flag
Will change in next revision.
>
>> static const VMStateDescription vmstate_amdvi_sysbus = {
>> diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h
>> index 28125130c6fc..e12ecade4baa 100644
>> --- a/hw/i386/amd_iommu.h
>> +++ b/hw/i386/amd_iommu.h
>> @@ -365,12 +365,18 @@ struct AMDVIState {
>> /* for each served device */
>> AMDVIAddressSpace **address_spaces[PCI_BUS_MAX];
>> + /* list of address spaces with registered notifiers */
>> + QLIST_HEAD(, AMDVIAddressSpace) amdvi_as_with_notifiers;
>> +
>> /* IOTLB */
>> GHashTable *iotlb;
>> /* Interrupt remapping */
>> bool ga_enabled;
>> bool xtsup;
>> +
>> + /* DMA address translation */
>> + bool dma_remap;
>
> I think you should use this flag in the remapping path as well.
> I am aware that you are using it later in this series to switch the
> address space, but current patch will make things inconsistent for
> emulated and vfio devices (possibly breaking the bisect).
The change in behavior happens only if the user explicitly sets
dma-remap=on property in the command line, which is why I made it off by
default.
To eliminate the possibility of using dma-remap=on before all the
infrastructure to support it is in place, I will move this patch and
[5/18] to the end of the series. Does that address your concern?
>
> Also newer AMD IVRS format provides a HATDis bit (Table 96 in IOMMU
> Specs [1]), informing the guest kernel that V1 page table is disabled in
> the IOMMU.
Sounds like this mechanism could have been used until now to prevent the
scenario where we can have the guest request DMA remapping and the
vIOMMU doesn't have the capability. Seems moot now that we are actually
adding the capability.
Its good idea to set this bit in IVRS when dma_remap=false.
> This way a "HATDis bit aware" guest can enable iommu.passthrough.
I'd need to research how to implement this, but isn't this enhancement
better added in separate series, since it also requires a companion
Linux change? I don't recall the Linux driver being "HATDis aware" (or
even HATS aware for that matter), but perhaps I am mistaken...
>
> Also, is it a good idea to have default value for dma_remap=false ?
> Consider the guest which is not aware of HATDis bit. Things will break
> if such guest boots with iommu.passthrough=0 (recreating the pt=on
> scenario).
That is not new, that is the current behavior that this series is trying
to fix by adding the missing functionality.
As far as the default value for dma-remap property, I think it must be
set to 0/false (i.e. current behavior unchanged) until we deem the DMA
remapping feature stable enough to be made available for guests.
On that topic, maybe it should be an experimental feature for now i.e.
"x-dma-remap".
>
> [1] https://www.amd.com/content/dam/amd/en/documents/processor-tech-
> docs/specifications/48882_IOMMU.pdf
>
> Regards
> Sairaj Kodilkar
>
> PS: Sorry If I missed something here, I haven't progressed much in the
> series.
No problem at all, the feedback is appreciated.
Thank you,
Alejandro
>
>> };
>> uint64_t amdvi_extended_feature_register(AMDVIState *s);
>
next prev parent reply other threads:[~2025-04-16 22:18 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-14 2:02 [PATCH 00/18] AMD vIOMMU: DMA remapping support for VFIO devices Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 01/18] memory: Adjust event ranges to fit within notifier boundaries Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 02/18] amd_iommu: Add helper function to extract the DTE Alejandro Jimenez
2025-04-16 11:36 ` Sairaj Kodilkar
2025-04-16 13:29 ` Alejandro Jimenez
2025-04-16 18:50 ` Michael S. Tsirkin
2025-04-16 22:37 ` Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 03/18] amd_iommu: Add support for IOMMU notifier Alejandro Jimenez
2025-04-16 12:14 ` Sairaj Kodilkar
2025-04-16 22:17 ` Alejandro Jimenez [this message]
2025-04-17 10:19 ` Sairaj Kodilkar
2025-04-17 16:21 ` Alejandro Jimenez
2025-04-17 16:34 ` Michael S. Tsirkin
2025-04-18 6:33 ` Sairaj Kodilkar
2025-04-14 2:02 ` [PATCH 04/18] amd_iommu: Unmap all address spaces under the AMD IOMMU on reset Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 05/18] amd_iommu: Toggle memory regions based on address translation mode Alejandro Jimenez
2025-04-22 12:17 ` Sairaj Kodilkar
2025-04-28 21:10 ` Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 06/18] amd_iommu: Set all address spaces to default translation mode on reset Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 07/18] amd_iommu: Return an error when unable to read PTE from guest memory Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 08/18] amd_iommu: Helper to decode size of page invalidation command Alejandro Jimenez
2025-04-22 12:26 ` Sairaj Kodilkar
2025-04-28 21:16 ` Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 09/18] amd_iommu: Add helpers to walk AMD v1 Page Table format Alejandro Jimenez
2025-04-17 12:40 ` CLEMENT MATHIEU--DRIF
2025-04-17 15:27 ` Alejandro Jimenez
2025-04-18 5:30 ` CLEMENT MATHIEU--DRIF
2025-04-23 6:28 ` Sairaj Kodilkar
2025-04-14 2:02 ` [PATCH 10/18] amd_iommu: Add a page walker to sync shadow page tables on invalidation Alejandro Jimenez
2025-04-17 15:14 ` Ethan MILON
2025-04-17 15:45 ` Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 11/18] amd_iommu: Sync shadow page tables on page invalidation Alejandro Jimenez
2025-04-22 12:38 ` Sairaj Kodilkar
2025-04-22 12:38 ` Sairaj Kodilkar
2025-04-29 19:47 ` Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 12/18] amd_iommu: Add replay callback Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 13/18] amd_iommu: Invalidate address translations on INVALIDATE_IOMMU_ALL Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 14/18] amd_iommu: Toggle address translation on device table entry invalidation Alejandro Jimenez
2025-04-22 12:48 ` Sairaj Kodilkar
2025-04-29 20:45 ` Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 15/18] amd_iommu: Use iova_tree records to determine large page size on UNMAP Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 16/18] amd_iommu: Do not assume passthrough translation when DTE[TV]=0 Alejandro Jimenez
2025-04-23 6:06 ` Sairaj Kodilkar
2025-04-14 2:02 ` [PATCH 17/18] amd_iommu: Refactor amdvi_page_walk() to use common code for page walk Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 18/18] amd_iommu: Do not emit I/O page fault events during replay() Alejandro Jimenez
2025-04-23 6:18 ` Sairaj Kodilkar
2025-04-23 10:45 ` [PATCH 00/18] AMD vIOMMU: DMA remapping support for VFIO devices Sairaj Kodilkar
2025-04-23 10:56 ` Sairaj Kodilkar
2025-04-24 11:49 ` Joao Martins
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