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[88.21.103.182]) by smtp.gmail.com with ESMTPSA id w13sm2364554wru.38.2019.12.09.23.49.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 09 Dec 2019 23:49:09 -0800 (PST) Subject: Re: [PATCH 1/2] hw/sd: Configure number of slots exposed by the ASPEED SDHCI model To: Andrew Jeffery , qemu-arm@nongnu.org References: <11e1d38d2374a48996a3496c906db215de246583.1575938234.git-series.andrew@aj.id.au> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Tue, 10 Dec 2019 08:49:08 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.2 MIME-Version: 1.0 In-Reply-To: <11e1d38d2374a48996a3496c906db215de246583.1575938234.git-series.andrew@aj.id.au> Content-Language: en-US X-MC-Unique: _dLgQ5TXNRS0tQrhWYQgVg-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, joel@jms.id.au, qemu-devel@nongnu.org, clg@kaod.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/10/19 1:52 AM, Andrew Jeffery wrote: > The AST2600 includes a second cut-down version of the SD/MMC controller > found in the AST2500, named the eMMC controller. It's cut down in the > sense that it only supports one slot rather than two, but it brings the > total number of slots supported by the AST2600 to three. >=20 > The existing code assumed that the SD controller always provided two > slots. Rework the SDHCI object to expose the number of slots as a > property to be set by the SoC configuration. >=20 > Signed-off-by: Andrew Jeffery Reviewed-by: Philippe Mathieu-Daud=C3=A9 > --- > hw/arm/aspeed.c | 2 +- > hw/arm/aspeed_ast2600.c | 2 ++ > hw/arm/aspeed_soc.c | 3 +++ > hw/sd/aspeed_sdhci.c | 11 +++++++++-- > include/hw/sd/aspeed_sdhci.h | 1 + > 5 files changed, 16 insertions(+), 3 deletions(-) >=20 > diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c > index 028191ff36fc..862549b1f3a9 100644 > --- a/hw/arm/aspeed.c > +++ b/hw/arm/aspeed.c > @@ -259,7 +259,7 @@ static void aspeed_board_init(MachineState *machine, > cfg->i2c_init(bmc); > } > =20 > - for (i =3D 0; i < ARRAY_SIZE(bmc->soc.sdhci.slots); i++) { > + for (i =3D 0; i < bmc->soc.sdhci.num_slots; i++) { > SDHCIState *sdhci =3D &bmc->soc.sdhci.slots[i]; > DriveInfo *dinfo =3D drive_get_next(IF_SD); > BlockBackend *blk; > diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c > index 931887ac681f..931ee5aae183 100644 > --- a/hw/arm/aspeed_ast2600.c > +++ b/hw/arm/aspeed_ast2600.c > @@ -208,6 +208,8 @@ static void aspeed_soc_ast2600_init(Object *obj) > sysbus_init_child_obj(obj, "sdc", OBJECT(&s->sdhci), sizeof(s->sdhc= i), > TYPE_ASPEED_SDHCI); > =20 > + object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_ab= ort); > + > /* Init sd card slot class here so that they're under the correct p= arent */ > for (i =3D 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { > sysbus_init_child_obj(obj, "sdhci[*]", OBJECT(&s->sdhci.slots[i= ]), > diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c > index f4fe243458fd..3498f55603f2 100644 > --- a/hw/arm/aspeed_soc.c > +++ b/hw/arm/aspeed_soc.c > @@ -215,6 +215,9 @@ static void aspeed_soc_init(Object *obj) > sysbus_init_child_obj(obj, "sdc", OBJECT(&s->sdhci), sizeof(s->sdhc= i), > TYPE_ASPEED_SDHCI); > =20 > + object_property_set_int(OBJECT(&s->sdhci), ASPEED_SDHCI_NUM_SLOTS, > + "num-slots", &error_abort); > + > /* Init sd card slot class here so that they're under the correct p= arent */ > for (i =3D 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { > sysbus_init_child_obj(obj, "sdhci[*]", OBJECT(&s->sdhci.slots[i= ]), > diff --git a/hw/sd/aspeed_sdhci.c b/hw/sd/aspeed_sdhci.c > index cff3eb7dd21e..939d1510dedb 100644 > --- a/hw/sd/aspeed_sdhci.c > +++ b/hw/sd/aspeed_sdhci.c > @@ -13,6 +13,7 @@ > #include "qapi/error.h" > #include "hw/irq.h" > #include "migration/vmstate.h" > +#include "hw/qdev-properties.h" > =20 > #define ASPEED_SDHCI_INFO 0x00 > #define ASPEED_SDHCI_INFO_RESET 0x00030000 > @@ -120,14 +121,14 @@ static void aspeed_sdhci_realize(DeviceState *dev, = Error **errp) > =20 > /* Create input irqs for the slots */ > qdev_init_gpio_in_named_with_opaque(DEVICE(sbd), aspeed_sdhci_set_i= rq, > - sdhci, NULL, ASPEED_SDHCI_NUM_SL= OTS); > + sdhci, NULL, sdhci->num_slots); > =20 > sysbus_init_irq(sbd, &sdhci->irq); > memory_region_init_io(&sdhci->iomem, OBJECT(sdhci), &aspeed_sdhci_o= ps, > sdhci, TYPE_ASPEED_SDHCI, 0x1000); > sysbus_init_mmio(sbd, &sdhci->iomem); > =20 > - for (int i =3D 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { > + for (int i =3D 0; i < sdhci->num_slots; ++i) { > Object *sdhci_slot =3D OBJECT(&sdhci->slots[i]); > SysBusDevice *sbd_slot =3D SYS_BUS_DEVICE(&sdhci->slots[i]); > =20 > @@ -174,6 +175,11 @@ static const VMStateDescription vmstate_aspeed_sdhci= =3D { > }, > }; > =20 > +static Property aspeed_sdhci_properties[] =3D { > + DEFINE_PROP_UINT8("num-slots", AspeedSDHCIState, num_slots, 0), > + DEFINE_PROP_END_OF_LIST(), > +}; > + > static void aspeed_sdhci_class_init(ObjectClass *classp, void *data) > { > DeviceClass *dc =3D DEVICE_CLASS(classp); > @@ -181,6 +187,7 @@ static void aspeed_sdhci_class_init(ObjectClass *clas= sp, void *data) > dc->realize =3D aspeed_sdhci_realize; > dc->reset =3D aspeed_sdhci_reset; > dc->vmsd =3D &vmstate_aspeed_sdhci; > + dc->props =3D aspeed_sdhci_properties; > } > =20 > static TypeInfo aspeed_sdhci_info =3D { > diff --git a/include/hw/sd/aspeed_sdhci.h b/include/hw/sd/aspeed_sdhci.h > index dfdab4379021..dffbb46946b9 100644 > --- a/include/hw/sd/aspeed_sdhci.h > +++ b/include/hw/sd/aspeed_sdhci.h > @@ -24,6 +24,7 @@ typedef struct AspeedSDHCIState { > SysBusDevice parent; > =20 > SDHCIState slots[ASPEED_SDHCI_NUM_SLOTS]; > + uint8_t num_slots; > =20 > MemoryRegion iomem; > qemu_irq irq; >=20