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Thu, 31 Jul 2025 21:24:05 -0700 (PDT) Received: from [192.168.4.112] ([180.233.125.160]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-241e8ab38b4sm31085455ad.181.2025.07.31.21.24.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 31 Jul 2025 21:24:04 -0700 (PDT) Message-ID: Date: Fri, 1 Aug 2025 14:24:00 +1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 47/82] target/arm: Expand pstate to 64 bits To: Pierrick Bouvier , qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Thiago Jung Bauermann References: <20250727080254.83840-1-richard.henderson@linaro.org> <20250727080254.83840-48-richard.henderson@linaro.org> From: Richard Henderson Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 8/1/25 05:13, Pierrick Bouvier wrote: > On 7/27/25 1:02 AM, Richard Henderson wrote: >> The ARM now defines 36 bits in SPSR_ELx in aarch64 mode, so >> it's time to bite the bullet and extend PSTATE to match. >> >> Most changes are straightforward, adjusting printf formats, >> changing local variable types.  More complex is migration, >> where to maintain backward compatibility a new pstate64 >> record is introduced, and only when one of the extensions >> that sets bits 32-35 are active. >> >> The fate of gdbstub is left undecided for the moment. ... >> diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c >> index 64ee9b3b56..3cef47281a 100644 >> --- a/target/arm/gdbstub64.c >> +++ b/target/arm/gdbstub64.c >> @@ -47,6 +47,7 @@ int aarch64_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, >> int n) >>       case 32: >>           return gdb_get_reg64(mem_buf, env->pc); >>       case 33: >> +        /* pstate is now a 64-bit value; can we simply adjust the xml? */ >>           return gdb_get_reg32(mem_buf, pstate_read(env)); >>       } > > If I'm correct, we currently don't expose PSTATE through gdbstub, but only CPSR. This was > a bit confusing for me, considering that CPSR is not even supposed to exist in Aarch64. Correct. An old error, for sure. > Maybe it's a good opportunity to expose PSTATE instead, which could have a 64 bits size. > This way, we don't break any workflow. Hmm, perhaps adding a "org.gnu.gdb.aarch64.pstate" xml with just one 64-bit value is the best solution. Thiago? r~