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([2602:ae:154e:c001:caf5:5ae2:432a:1bdf]) by smtp.gmail.com with ESMTPSA id w24-20020a170902d71800b001b8052d58a0sm1815818ply.305.2023.07.27.09.22.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 27 Jul 2023 09:22:25 -0700 (PDT) Message-ID: Date: Thu, 27 Jul 2023 09:22:23 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH] target/arm: Avoid writing to constant TCGv in trans_CSEL() Content-Language: en-US To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org References: <20230727103906.2641264-1-peter.maydell@linaro.org> From: Richard Henderson In-Reply-To: <20230727103906.2641264-1-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.091, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 7/27/23 03:39, Peter Maydell wrote: > In commit 0b188ea05acb5 we changed the implementation of > trans_CSEL() to use tcg_constant_i32(). However, this change > was incorrect, because the implementation of the function > sets up the TCGv_i32 rn and rm to be either zero or else > a TCG temp created in load_reg(), and these TCG temps are > then in both cases written to by the emitted TCG ops. > The result is that we hit a TCG assertion: > > qemu-system-arm: ../../tcg/tcg.c:4455: tcg_reg_alloc_mov: Assertion `!temp_readonly(ots)' failed. > > (or on a non-debug build, just produce a garbage result) > > Adjust the code so that rn and rm are always writeable > temporaries whether the instruction is using the special > case "0" or a normal register as input. > > Cc: qemu-stable@nongnu.org > Fixes: 0b188ea05acb5 ("target/arm: Use tcg_constant in trans_CSEL") > Signed-off-by: Peter Maydell > --- > These insns are v8.1M-only, which is why this bug has > lingered for so long. > --- > target/arm/tcg/translate.c | 15 ++++++++------- > 1 file changed, 8 insertions(+), 7 deletions(-) Reviewed-by: Richard Henderson r~