From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46463) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bA07U-0001AA-UU for qemu-devel@nongnu.org; Mon, 06 Jun 2016 15:23:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bA07O-00043L-Tm for qemu-devel@nongnu.org; Mon, 06 Jun 2016 15:23:27 -0400 Received: from mail-qg0-x230.google.com ([2607:f8b0:400d:c04::230]:36511) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bA07O-00043H-Oh for qemu-devel@nongnu.org; Mon, 06 Jun 2016 15:23:22 -0400 Received: by mail-qg0-x230.google.com with SMTP id q32so47519018qgq.3 for ; Mon, 06 Jun 2016 12:23:22 -0700 (PDT) Sender: Richard Henderson References: <20160531183928.29406-1-bobby.prani@gmail.com> <20160531183928.29406-2-bobby.prani@gmail.com> <57505F1A.3020808@gmail.com> <68c32d50-adc2-25b2-b136-2a486f6b3de7@twiddle.net> <5750995D.6030005@gmail.com> <8e9b8569-89a5-845a-a856-7f2fa4435659@twiddle.net> <57559A66.6040408@gmail.com> <57559B93.7090003@gmail.com> <5755A164.9040709@gmail.com> From: Richard Henderson Message-ID: Date: Mon, 6 Jun 2016 12:23:19 -0700 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for memory barrier List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Pranith Kumar , Sergey Fedorov Cc: "open list:All patches CC here" , =?UTF-8?Q?Alex_Benn=c3=a9e?= On 06/06/2016 10:11 AM, Pranith Kumar wrote: > If I read it correctly TCG_BAR_SYNC is equivalent to OR of all the > other four barriers. I am not sure if we can just construct SYNC like > this or if we need to define it explicitly though. AFAICS, sparc membar #sync is stronger. Compare PowerPC hwsync and lwsync. I would define lwsync as the OR of the other 4 barriers, but hwsync as TCG_BAR_SYNC. r~